| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/ |
| r300_state_derived.c | 755 /* The KIL opcode fix, see below. */
[all...] |
| /external/chromium_org/third_party/mesa/src/src/glx/ |
| indirect_vertex_array_priv.h | 245 * other, there should be a way to select which opcode to use.
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_shader.cpp | 274 brw_math_function(enum opcode op)
|
| brw_vs_constval.c | 225 switch (inst->Opcode) {
|
| /external/chromium_org/third_party/skia/src/core/ |
| SkPictureRecord.h | 126 * the opcode & size are stored.
|
| /external/chromium_org/v8/src/arm/ |
| constants-arm.h | 152 enum Opcode {
630 return static_cast<Opcode>(Bits(24, 21));
632 inline Opcode OpcodeField() const {
633 return static_cast<Opcode>(BitField(24, 21));
|
| /external/chromium_org/v8/src/ |
| hydrogen-environment-liveness.cc | 120 switch (instr->opcode()) {
|
| /external/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| BasicValueFactory.h | 183 const llvm::APSInt* evalAPSInt(BinaryOperator::Opcode Op,
|
| /external/clang/lib/StaticAnalyzer/Core/ |
| ExprEngineC.cpp | 43 BinaryOperator::Opcode Op = B->getOpcode();
101 llvm_unreachable("Invalid opcode for compound assignment.");
822 llvm_unreachable("Invalid Opcode.");
[all...] |
| /external/dexmaker/src/dx/java/com/android/dx/ssa/back/ |
| FirstFitLocalCombiningAllocator.java | 222 Rop opcode = defInsn.getOpcode(); local
224 // opcode == null for phi insns.
225 if (opcode != null && opcode.getOpcode() == RegOps.MOVE_PARAM) {
[all...] |
| /external/icu4c/i18n/ |
| regexcmp.h | 96 // there is space to add an opcode there.
|
| /external/llvm/lib/CodeGen/ |
| ScoreboardHazardRecognizer.cpp | 186 if (DAG->TII->isZeroCost(MCID->Opcode))
|
| /external/llvm/lib/DebugInfo/ |
| DWARFDebugLine.h | 58 // The number assigned to the first special opcode.
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.cpp | 119 /// Does the Opcode represent a conditional branch that we can remove and re-add
131 /// date. First element will be the opcode, and subsequent ones define the
349 unsigned Opcode = MI.getOpcode();
350 switch (Opcode) {
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430BranchSelector.cpp | 13 // positions pass, and a branch pseudo op to machine branch opcode pass. This
|
| MSP430ISelLowering.h | 83 virtual const char *getTargetNodeName(unsigned Opcode) const;
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCBranchSelector.cpp | 13 // positions pass, and a branch pseudo op to machine branch opcode pass. This
|
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrFormats.td | 111 let Inst{13-5} = opfval; // fp opcode
|
| /external/llvm/lib/Target/SystemZ/ |
| README.txt | 122 ISD opcode. We could add one and implement it using LOAD POSITIVE.
|
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.h | 100 virtual const char *getTargetNodeName(unsigned Opcode) const;
|
| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineLoadStoreAlloca.cpp | 510 Instruction::CastOps opcode = Instruction::BitCast; local
515 opcode = Instruction::IntToPtr;
518 opcode = Instruction::PtrToInt;
526 NewCast = IC.Builder->CreateCast(opcode, SIOp0, CastDstTy,
|
| /external/llvm/test/MC/ARM/ |
| eh-directive-text-section-multiple-func.s | 52 @ word is filled with FINISH opcode (0xB0).
|
| /external/llvm/utils/TableGen/ |
| X86ModRMFilters.h | 173 /// ExactFilter - The occasional extended opcode (such as VMCALL or MONITOR)
|
| /external/mesa3d/src/gallium/drivers/r300/ |
| r300_state_derived.c | 755 /* The KIL opcode fix, see below. */
[all...] |
| /external/mesa3d/src/glx/ |
| indirect_vertex_array_priv.h | 245 * other, there should be a way to select which opcode to use.
|
