| /dalvik/dx/src/com/android/dx/io/ |
| Opcodes.java | 20 * All the Dalvik opcode value constants. See the related spec
21 * document for the meaning and instruction format of each opcode.
25 * pseudo-opcode used for nonstandard format payload "instructions". TODO:
32 * pseudo-opcode used to indicate there is no next opcode; used
33 * in opcode chaining lists
37 /** minimum valid opcode value */
40 /** maximum valid opcode value */
43 // BEGIN(opcodes); GENERATED AUTOMATICALLY BY opcode-gen
264 // TODO: Generate these payload opcodes with opcode-gen
[all...] |
| /dalvik/vm/mterp/armv5te/ |
| OP_CMPL_DOUBLE.S | 26 bhi .L${opcode}_gt_or_nan @ C set and Z clear, disambiguate
29 .L${opcode}_finish:
33 GET_INST_OPCODE(ip) @ extract opcode from rINST
40 .L${opcode}_gt_or_nan:
46 bcc .L${opcode}_finish
48 b .L${opcode}_finish
|
| OP_NEW_ARRAY.S | 22 bne .L${opcode}_finish @ resolved, continue
23 b .L${opcode}_resolve @ do resolve now
33 .L${opcode}_resolve:
43 @ fall through to ${opcode}_finish
51 .L${opcode}_finish:
59 GET_INST_OPCODE(ip) @ extract opcode from rINST
|
| /dalvik/vm/mterp/x86/ |
| OP_INVOKE_SUPER.S | 28 je .L${opcode}_resolve
34 .L${opcode}_continue:
38 jae .L${opcode}_nsm # method not present in superclass
50 .L${opcode}_resolve:
60 jne .L${opcode}_continue # good to go - continue
67 .L${opcode}_nsm:
|
| OP_EXECUTE_INLINE.S | 20 jnz .L${opcode}_debugprofile # yes, take slow path
21 .L${opcode}_resume:
24 call .L${opcode}_continue # make call; will return after
32 .L${opcode}_continue:
70 # will return to caller of .L${opcode}_continue
76 .L${opcode}_debugprofile:
84 jz .L${opcode}_resume # not resolved, just move on
93 call .L${opcode}_continue # make call; will return after
|
| OP_MONITOR_EXIT.S | 16 je .L${opcode}_errNullObject # go if so
27 .L${opcode}_errNullObject:
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_fs.h | 144 fs_inst(enum opcode opcode);
145 fs_inst(enum opcode opcode, fs_reg dst);
146 fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0);
147 fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
148 fs_inst(enum opcode opcode, fs_reg dst
157 enum opcode opcode; \/* BRW_OPCODE_* or FS_OPCODE_* *\/ member in class:fs_inst
[all...] |
| brw_vec4.h | 161 vec4_instruction(vec4_visitor *v, enum opcode opcode,
170 enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */ member in class:brw::vec4_instruction
334 vec4_instruction *emit(enum opcode opcode);
336 vec4_instruction *emit(enum opcode opcode, dst_reg dst, src_reg src0);
338 vec4_instruction *emit(enum opcode opcode, dst_reg dst
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCTargetTransformInfo.cpp | 89 virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty,
94 virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
96 virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
98 virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
100 virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src,
171 unsigned PPCTTI::getArithmeticInstrCost(unsigned Opcode, Type *Ty,
174 assert(TLI->InstructionOpcodeToISD(Opcode) && "Invalid opcode");
177 return TargetTransformInfo::getArithmeticInstrCost(Opcode, Ty, Op1Info,
186 unsigned PPCTTI::getCastInstrCost(unsigned Opcode, Type *Dst, Type *Src) const
[all...] |
| /external/llvm/lib/Target/R600/ |
| SIInstrInfo.h | 38 unsigned commuteOpcode(unsigned Opcode) const;
47 virtual bool isMov(unsigned Opcode) const;
80 int getVOPe64(uint16_t Opcode);
81 int getCommuteRev(uint16_t Opcode);
82 int getCommuteOrig(uint16_t Opcode);
83 int isMIMG(uint16_t Opcode);
|
| /external/llvm/test/TableGen/ |
| TargetInstrSpec.td | 16 class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
18 bits<8> Opcode = opcode;
79 multiclass arith<bits<8> opcode, string asmstr, string intr, list<dag> patterns> {
80 def PS : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
87 def PD : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
|
| MultiPat.td | 24 class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr,
26 bits<8> Opcode = opcode;
91 class Base<bits<8> opcode, dag opnds, dag iopnds, string asmstr, Intrinsic intr,
93 : Inst<opcode, opnds, iopnds, asmstr,
105 multiclass arith<bits<8> opcode, string asmstr, string intr, list<list<dag>> patterns> {
106 def PS : Base<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
109 def PD : Base<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2),
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_fs.h | 144 fs_inst(enum opcode opcode);
145 fs_inst(enum opcode opcode, fs_reg dst);
146 fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0);
147 fs_inst(enum opcode opcode, fs_reg dst, fs_reg src0, fs_reg src1);
148 fs_inst(enum opcode opcode, fs_reg dst
157 enum opcode opcode; \/* BRW_OPCODE_* or FS_OPCODE_* *\/ member in class:fs_inst
[all...] |
| brw_vec4.h | 161 vec4_instruction(vec4_visitor *v, enum opcode opcode,
170 enum opcode opcode; /* BRW_OPCODE_* or FS_OPCODE_* */ member in class:brw::vec4_instruction
334 vec4_instruction *emit(enum opcode opcode);
336 vec4_instruction *emit(enum opcode opcode, dst_reg dst, src_reg src0);
338 vec4_instruction *emit(enum opcode opcode, dst_reg dst
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
| radeon_dataflow_deadcode.c | 154 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
159 if (opcode->HasDstReg) {
184 for(unsigned int src = 0; src < opcode->NumSrcRegs; ++src) {
233 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
235 switch(opcode->Opcode){
244 opcode = rc_get_opcode_info(ptr->U.I.Opcode);
316 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
[all...] |
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| radeon_dataflow_deadcode.c | 154 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
159 if (opcode->HasDstReg) {
184 for(unsigned int src = 0; src < opcode->NumSrcRegs; ++src) {
233 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
235 switch(opcode->Opcode){
244 opcode = rc_get_opcode_info(ptr->U.I.Opcode);
316 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
[all...] |
| /dalvik/vm/compiler/template/armv5te/ |
| TEMPLATE_PERIODIC_PROFILING.S | 17 blt .L${opcode}_disable_profiling
22 .L${opcode}_disable_profiling:
|
| /dalvik/vm/compiler/template/mips/ |
| TEMPLATE_PERIODIC_PROFILING.S | 20 bltz a3, .L${opcode}_disable_profiling
24 .L${opcode}_disable_profiling:
|
| funop.S | 21 .L${opcode}_set_vreg:
27 .L${opcode}_set_vreg_f:
|
| funopWider.S | 19 .L${opcode}_set_vreg:
26 .L${opcode}_set_vreg:
|
| /dalvik/vm/mterp/mips/ |
| OP_AGET_WIDE.S | 20 .L${opcode}_finish:
24 GET_INST_OPCODE(t0) # extract opcode from rINST
|
| /development/tools/mkstubs/src/com/android/mkstubs/stubber/ |
| MethodStubber.java | 50 Opcodes.INVOKESPECIAL, // opcode
95 public void visitFieldInsn(int opcode, String owner, String name, String desc) {
110 public void visitInsn(int opcode) {
115 public void visitIntInsn(int opcode, int operand) {
120 public void visitJumpInsn(int opcode, Label label) {
156 public void visitMethodInsn(int opcode, String owner, String name, String desc) {
176 public void visitTypeInsn(int opcode, String type) {
181 public void visitVarInsn(int opcode, int var) {
|
| /external/bluetooth/bluedroid/stack/avrc/ |
| avrc_utils.c | 192 ** Description This function returns the opcode of the given pdu
199 UINT8 opcode = 0; local
205 opcode = AVRC_OP_PASS_THRU;
209 opcode = AVRC_OP_VENDOR;
213 return opcode;
220 ** Description This function returns the opcode of the given pdu
225 BOOLEAN avrc_is_valid_opcode(UINT8 opcode)
228 switch (opcode)
|
| /external/javassist/src/main/javassist/bytecode/ |
| BadBytecode.java | 22 public BadBytecode(int opcode) {
23 super("bytecode " + opcode);
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZMCInstLower.cpp | 18 // If Opcode is an interprocedural reference that can be shortened,
20 static unsigned getShortenedInstr(unsigned Opcode) {
21 switch (Opcode) {
24 return Opcode;
96 unsigned Opcode = MI->getOpcode();
100 Opcode = getShortenedInstr(Opcode);
101 OutMI.setOpcode(Opcode);
|
