| /dalvik/dx/src/com/android/dx/io/instructions/ |
| PackedSwitchPayloadDecodedInstruction.java | 38 int opcode, int firstKey, int[] targets) {
39 super(format, opcode, 0, null, 0, 0L);
|
| RegisterRangeDecodedInstruction.java | 35 public RegisterRangeDecodedInstruction(InstructionCodec format, int opcode,
38 super(format, opcode, index, indexType, target, literal);
|
| SparseSwitchPayloadDecodedInstruction.java | 38 int opcode, int[] keys, int[] targets) {
39 super(format, opcode, 0, null, 0, 0L);
|
| ThreeRegisterDecodedInstruction.java | 37 public ThreeRegisterDecodedInstruction(InstructionCodec format, int opcode,
40 super(format, opcode, index, indexType, target, literal);
|
| TwoRegisterDecodedInstruction.java | 34 public TwoRegisterDecodedInstruction(InstructionCodec format, int opcode,
37 super(format, opcode, index, indexType, target, literal);
|
| ZeroRegisterDecodedInstruction.java | 28 public ZeroRegisterDecodedInstruction(InstructionCodec format, int opcode,
30 super(format, opcode, index, indexType, target, literal);
|
| /dalvik/dx/src/com/android/dx/rop/code/ |
| ConservativeTranslationAdvice.java | 37 public boolean hasConstantOperation(Rop opcode,
43 public boolean requiresSourcesInOrder(Rop opcode,
|
| /dalvik/dx/tests/111-use-null-as-array/ |
| info.txt | 4 will inevitably throw a NullPointerException, but if the opcode weren't
13 recover the "true" original meaning at the level of actual opcode
|
| /dalvik/vm/compiler/codegen/arm/ |
| GlobalOptimizations.cpp | 34 if (thisLIR->opcode == kThumbBUncond) {
54 if (!isPseudoOpcode(nextLIR->opcode) ||
|
| /dalvik/vm/compiler/template/mips/ |
| TEMPLATE_CMP_LONG.S | 21 bnez v0, .L${opcode}_finish
26 .L${opcode}_finish:
|
| /dalvik/vm/mterp/armv5te/ |
| OP_FILLED_NEW_ARRAY.S | 18 bne .L${opcode}_continue @ yes, continue on
25 b .L${opcode}_continue
33 .L${opcode}_continue:
46 bne .L${opcode}_notimpl @ no, not handled yet
88 GET_INST_OPCODE(ip) @ ip<- opcode from rINST
97 .L${opcode}_notimpl:
98 ldr r0, .L_strFilledNewArrayNotImpl_${opcode}
108 .L_strFilledNewArrayNotImpl_${opcode}:
|
| /dalvik/vm/mterp/mips/ |
| unflopWide.S | 23 .L${opcode}_set_vreg:
29 GET_INST_OPCODE(t0) # extract opcode from rINST
|
| /dalvik/vm/mterp/x86/ |
| OP_CONST_CLASS.S | 12 je .L${opcode}_resolve
20 .L${opcode}_resolve:
|
| OP_CONST_STRING.S | 13 je .L${opcode}_resolve
20 .L${opcode}_resolve:
|
| OP_CONST_STRING_JUMBO.S | 13 je .L${opcode}_resolve
20 .L${opcode}_resolve:
|
| /external/chromium_org/sandbox/win/src/sidestep/ |
| mini_disassembler.h | 21 // assembly parameters. The name of the opcode (as a string) is given,
26 // -# Indicates if opcode is a jump (any kind) or a return (any kind)
30 // -# The opcode length is always calculated, so that the patching utility
65 // opcode. In the last two (error) cases, cbInstruction will be set
83 // operand_bytes_ if any are specifies by the opcode directly.
84 // Returns Number of opcode bytes.
107 // The instruction type we have decoded from the opcode.
134 // Huge big opcode table based on the IA-32 manual, defined
|
| /external/chromium_org/third_party/mesa/src/src/gallium/docs/ |
| llvm-todo.txt | 7 TXQ opcode support - airlied WIP
8 TXF opcode support.
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
| radeon_compiler.c | 42 c->Program.Instructions.U.I.Opcode = RC_OPCODE_ILLEGAL_OPCODE;
119 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
122 for (i = 0; i < opcode->NumSrcRegs; ++i) {
127 if (opcode->HasDstReg) {
145 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
148 for(i = 0; i < opcode->NumSrcRegs; ++i) {
177 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
200 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
300 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
344 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeonsi/ |
| radeonsi_pm4.c | 35 void si_pm4_cmd_begin(struct si_pm4_state *state, unsigned opcode)
37 state->last_opcode = opcode;
58 unsigned opcode; local
61 opcode = PKT3_SET_CONFIG_REG;
65 opcode = PKT3_SET_SH_REG;
69 opcode = PKT3_SET_CONTEXT_REG;
78 if (opcode != state->last_opcode || reg != (state->last_reg + 1)) {
79 si_pm4_cmd_begin(state, opcode);
|
| /external/chromium_org/third_party/mesa/src/src/glx/ |
| glx_query.c | 46 __glXQueryServerString(Display * dpy, int opcode, CARD32 screen, CARD32 name)
70 __glXGetString(Display * dpy, int opcode, CARD32 contextTag, CARD32 name)
119 __glXGetStringFromServer(Display * dpy, int opcode, CARD32 glxCode,
139 req->reqType = opcode;
164 __glXQueryServerString(Display * dpy, int opcode, CARD32 screen, CARD32 name)
166 return __glXGetStringFromServer(dpy, opcode,
171 __glXGetString(Display * dpy, int opcode, CARD32 contextTag, CARD32 name)
173 return __glXGetStringFromServer(dpy, opcode, X_GLsop_GetString,
|
| /external/chromium_org/tools/memory_watcher/ |
| mini_disassembler.h | 29 // assembly parameters. The name of the opcode (as a string) is given,
34 // -# Indicates if opcode is a jump (any kind) or a return (any kind)
38 // -# The opcode length is always calculated, so that the patching utility
73 // opcode. In the last two (error) cases, cbInstruction will be set
90 // operand_bytes_ if any are specifies by the opcode directly.
91 // @return Number of opcode bytes.
114 // The instruction type we have decoded from the opcode.
141 // Huge big opcode table based on the IA-32 manual, defined
|
| /external/chromium_org/tools/traceline/traceline/sidestep/ |
| mini_disassembler.h | 21 // assembly parameters. The name of the opcode (as a string) is given,
26 // -# Indicates if opcode is a jump (any kind) or a return (any kind)
30 // -# The opcode length is always calculated, so that the patching utility
65 // opcode. In the last two (error) cases, cbInstruction will be set
83 // operand_bytes_ if any are specifies by the opcode directly.
84 // Returns Number of opcode bytes.
107 // The instruction type we have decoded from the opcode.
134 // Huge big opcode table based on the IA-32 manual, defined
|
| /external/dexmaker/src/dx/java/com/android/dx/io/instructions/ |
| OneRegisterDecodedInstruction.java | 31 public OneRegisterDecodedInstruction(InstructionCodec format, int opcode,
34 super(format, opcode, index, indexType, target, literal);
|
| PackedSwitchPayloadDecodedInstruction.java | 38 int opcode, int firstKey, int[] targets) {
39 super(format, opcode, 0, null, 0, 0L);
|
| RegisterRangeDecodedInstruction.java | 35 public RegisterRangeDecodedInstruction(InstructionCodec format, int opcode,
38 super(format, opcode, index, indexType, target, literal);
|
