/external/llvm/test/Assembler/ |
2007-01-16-CrashOnBadCast2.ll | 2 ; RUN: not llvm-as %s -o /dev/null 2>&1 | grep "invalid cast opcode for cast from"
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/sdk/emulator/qtools/ |
opcode.h | 9 // the opflags[] array in opcode.cpp. 10 enum Opcode { 113 // Define bit flags for the opcode categories 132 inline bool isALU(Opcode op) { return (opcode_flags[op] & kCatAlu) != 0; } 133 inline bool isBranch(Opcode op) { return (opcode_flags[op] & kCatBranch) != 0; } 134 inline bool isBranchLink(Opcode op) { 137 inline bool isBranchExch(Opcode op) { 140 inline bool isLoad(Opcode op) { return (opcode_flags[op] & kCatLoad) != 0; } 141 inline bool isLoadMultiple(Opcode op) { 144 inline bool isStoreMultiple(Opcode op) [all...] |
/art/runtime/ |
dex_instruction.h | 86 #define INSTRUCTION_ENUM(opcode, cname, p, f, r, i, a, v) cname = opcode, 159 int result = kInstructionSizeInCodeUnits[Opcode()]; 185 DCHECK(FormatOf(Opcode()) >= k10x && FormatOf(Opcode()) <= k10t); 191 DCHECK(FormatOf(Opcode()) >= k20t && FormatOf(Opcode()) <= k22c); 197 DCHECK(FormatOf(Opcode()) >= k32x && FormatOf(Opcode()) <= k3rc); 203 DCHECK(FormatOf(Opcode()) == k51l) 443 Instruction::Code opcode; member in struct:art::DecodedInstruction [all...] |
/external/llvm/test/TableGen/ |
cast.td | 15 class Inst<bits<8> opcode, dag oopnds, dag iopnds, string asmstr, 17 bits<8> Opcode = opcode; 66 multiclass arith<bits<8> opcode, string asmstr, string Intr> { 67 def PS : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), 71 def PD : Inst<opcode, (outs VR128:$dst), (ins VR128:$src1, VR128:$src2), 78 class IntInst<bits<8> opcode, string asmstr, Intrinsic Intr> : 79 Inst<opcode,(outs VR128:$dst), (ins VR128:$src1, VR128:$src2), 84 multiclass arith_int<bits<8> opcode, string asmstr, string Intr> { 85 def PS_Int : IntInst<opcode, asmstr, !cast<Intrinsic>(!strconcat(Intr, "_ps"))> [all...] |
/external/smali/dexlib/src/main/java/org/jf/dexlib/Code/Format/ |
Instruction11x.java | 32 import org.jf.dexlib.Code.Opcode; 42 public Instruction11x(Opcode opcode, short regA) { 43 super(opcode); 52 private Instruction11x(Opcode opcode, byte[] buffer, int bufferIndex) { 53 super(opcode); 59 out.writeByte(opcode.value); 72 public Instruction makeInstruction(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex) [all...] |
Instruction12x.java | 32 import org.jf.dexlib.Code.Opcode; 43 public Instruction12x(Opcode opcode, byte regA, byte regB) { 44 super(opcode); 55 private Instruction12x(Opcode opcode, byte[] buffer, int bufferIndex) { 56 super(opcode); 62 out.writeByte(opcode.value); 79 public Instruction makeInstruction(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex) [all...] |
Instruction31c.java | 33 import org.jf.dexlib.Code.Opcode; 44 public Instruction31c(Opcode opcode, short regA, Item referencedItem) { 45 super(opcode, referencedItem); 54 private Instruction31c(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex) { 55 super(dexFile, opcode, buffer, bufferIndex); 61 out.writeByte(opcode.value); 75 public Instruction makeInstruction(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex) [all...] |
Instruction21h.java | 33 import org.jf.dexlib.Code.Opcode; 44 public Instruction21h(Opcode opcode, short regA, short litB) { 45 super(opcode); 55 private Instruction21h(Opcode opcode, byte[] buffer, int bufferIndex) { 56 super(opcode); 63 out.writeByte(opcode.value); 81 if (opcode == Opcode.CONST_HIGH16) [all...] |
InstructionWithJumboReference.java | 35 import org.jf.dexlib.Code.Opcode; 42 protected InstructionWithJumboReference(Opcode opcode, Item referencedItem) { 43 super(opcode, referencedItem); 46 protected InstructionWithJumboReference(Opcode opcode, Item referencedItem, ReferenceType referenceType) { 47 super(opcode, referencedItem, referenceType); 50 protected InstructionWithJumboReference(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex) { 51 super(dexFile, opcode, buffer, bufferIndex) [all...] |
/art/compiler/dex/quick/x86/ |
x86_lir.h | 226 // MR - Memory Register - opcode [base + disp], reg 228 // AR - Array Register - opcode [base + index * scale + disp], reg 230 // TR - Thread Register - opcode fs:[disp], reg - where fs: is equal to Thread::Current() 232 // RR - Register Register - opcode reg1, reg2 234 // RM - Register Memory - opcode reg, [base + disp] 236 // RA - Register Array - opcode reg, [base + index * scale + disp] 238 // RT - Register Thread - opcode reg, fs:[disp] - where fs: is equal to Thread::Current() 240 // RI - Register Immediate - opcode reg, #immediate 242 // MI - Memory Immediate - opcode [base + disp], #immediate 244 // AI - Array Immediate - opcode [base + index * scale + disp], #immediat 404 X86OpCode opcode; \/\/ e.g. kOpAddRI member in struct:art::X86EncodingMap 410 uint8_t opcode; \/\/ 1 byte opcode member in struct:art::X86EncodingMap::__anon9 [all...] |
/external/tcpdump/ |
print-zephyr.c | 51 char *opcode; member in struct:z_packet 169 PARSE_FIELD_STR(z.opcode); 199 if (!strcmp(z.opcode, "USER_HIDE")) 201 else if (!strcmp(z.opcode, "USER_UNHIDE")) 209 printf(" zephyr-admin %s", str_to_lower(z.opcode)); 215 if (!strcmp(z.opcode, "SUBSCRIBE") || 216 !strcmp(z.opcode, "SUBSCRIBE_NODEFS") || 217 !strcmp(z.opcode, "UNSUBSCRIBE")) { 219 printf(" %ssub%s", strcmp(z.opcode, "SUBSCRIBE") ? "un" : "", 220 strcmp(z.opcode, "SUBSCRIBE_NODEFS") ? "" [all...] |
/dalvik/vm/compiler/codegen/mips/Mips32/ |
Factory.cpp | 57 res->opcode = kMipsFmovd; 61 res->opcode = kMipsFmovs; 64 res->opcode = kMipsMtc1; 70 res->opcode = kMipsMfc1; 158 MipsOpCode opcode = kMipsNop; local 161 opcode = kMipsB; 167 res = newLIR0(cUnit, opcode); 188 MipsOpCode opcode = kMipsNop; local 191 opcode = kMipsJalr; 196 return newLIR2(cUnit, opcode, r_RA, rDestSrc) 208 MipsOpCode opcode = kMipsNop; local 237 MipsOpCode opcode = kMipsNop; local 278 MipsOpCode opcode = kMipsNop; local 368 MipsOpCode opcode = kMipsNop; local 426 MipsOpCode opcode = kMipsNop; local 488 MipsOpCode opcode = kMipsNop; local 607 MipsOpCode opcode = kMipsNop; local 725 MipsOpCode opcode = kMipsNop; local 838 MipsOpCode opcode; local [all...] |
/dalvik/vm/mterp/mips/ |
OP_INVOKE_OBJECT_INIT_RANGE.S | 16 beqz a2, .L${opcode}_finish # no, go 18 .L${opcode}_setFinal: 25 .L${opcode}_finish: 28 bnez a1, .L${opcode}_debugger # Yes - skip optimization 30 GET_INST_OPCODE(t0) # t0<- opcode from rINST 41 .L${opcode}_debugger:
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OP_NEW_INSTANCE.S | 22 beqz a0, .L${opcode}_resolve # no, resolve it now 23 .L${opcode}_resolved: # a0=class 28 bne a1, t0, .L${opcode}_needinit # no, init class now 30 .L${opcode}_initialized: # a0=class 44 bnez a1, .L${opcode}_jitCheck 49 b .L${opcode}_continue 53 .L${opcode}_continue: 55 GET_INST_OPCODE(t0) # extract opcode from rINST 65 .L${opcode}_jitCheck: 68 bnez a1, .L${opcode}_continue # yes, finis [all...] |
/dalvik/vm/mterp/x86/ |
OP_CMP_LONG.S | 17 jl .L${opcode}_smaller 18 jg .L${opcode}_bigger 20 ja .L${opcode}_bigger 21 jb .L${opcode}_smaller 28 .L${opcode}_bigger: 36 .L${opcode}_smaller:
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/dalvik/vm/compiler/codegen/mips/ |
GlobalOptimizations.cpp | 34 if (!thisLIR->flags.isNop && thisLIR->opcode == kMipsB) { 54 if (!isPseudoOpCode(nextLIR->opcode) || 74 if (thisLIR->flags.isNop || thisLIR->opcode != kMipsMove) 88 if (nextLIR->flags.isNop || nextLIR->opcode == kMips32BitData) 91 if (isPseudoOpCode(nextLIR->opcode)) { 92 if (nextLIR->opcode == kMipsPseudoDalvikByteCodeBoundary || 93 nextLIR->opcode == kMipsPseudoBarrier || 94 nextLIR->opcode == kMipsPseudoExtended || 95 nextLIR->opcode == kMipsPseudoSSARep) 97 else if (nextLIR->opcode == kMipsPseudoTargetLabel | [all...] |
CodegenCommon.cpp | 40 assert(EncodingMap[lir->opcode].flags & (IS_LOAD | IS_STORE)); 63 assert(!(EncodingMap[lir->opcode].flags & IS_STORE)); 146 int opcode = lir->opcode; 149 if (opcode <= 0) { 154 flags = EncodingMap[lir->opcode].flags; 240 int flags = EncodingMap[lir->opcode].flags; 272 static MipsLIR *newLIR0(CompilationUnit *cUnit, MipsOpCode opcode) 275 assert(isPseudoOpCode(opcode) || (EncodingMap[opcode].flags & NO_OPERAND)) [all...] |
/external/proguard/src/proguard/classfile/instruction/ |
VariableInstruction.java | 52 public VariableInstruction(byte opcode) 54 this(opcode, embeddedVariable(opcode), 0); 58 public VariableInstruction(byte opcode, 61 this(opcode, variableIndex, 0); 65 public VariableInstruction(byte opcode, 69 this.opcode = opcode; 84 this.opcode = variableInstruction.opcode; [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/i915/ |
i915_debug_fp.c | 258 unsigned opcode, const unsigned * program) 260 if (opcode != A0_NOP) { 268 PRINTF(stream, "%s ", opcodes[opcode]); 271 if (args[opcode] == 1) { 278 if (args[opcode] == 2) { 292 unsigned opcode, const unsigned * program) 297 PRINTF(stream, "%s ", opcodes[opcode]); 310 unsigned opcode, const unsigned * program) 323 unsigned opcode, const unsigned * program) 325 PRINTF(stream, "%s ", opcodes[opcode]); 344 unsigned opcode = program[0] & (0x1f << 24); local [all...] |
/external/mesa3d/src/gallium/drivers/i915/ |
i915_debug_fp.c | 258 unsigned opcode, const unsigned * program) 260 if (opcode != A0_NOP) { 268 PRINTF(stream, "%s ", opcodes[opcode]); 271 if (args[opcode] == 1) { 278 if (args[opcode] == 2) { 292 unsigned opcode, const unsigned * program) 297 PRINTF(stream, "%s ", opcodes[opcode]); 310 unsigned opcode, const unsigned * program) 323 unsigned opcode, const unsigned * program) 325 PRINTF(stream, "%s ", opcodes[opcode]); 344 unsigned opcode = program[0] & (0x1f << 24); local [all...] |
/dalvik/vm/mterp/armv5te/ |
OP_CHECK_CAST.S | 18 beq .L${opcode}_okay @ null obj, cast always succeeds 22 beq .L${opcode}_resolve @ not resolved, do it now 23 .L${opcode}_resolved: 25 bne .L${opcode}_fullcheck @ no, do full check 26 .L${opcode}_okay: 28 GET_INST_OPCODE(ip) @ extract opcode from rINST 38 .L${opcode}_fullcheck: 42 bne .L${opcode}_okay @ no, success 57 .L${opcode}_resolve: 68 b .L${opcode}_resolved @ pick up where we left of [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/ |
tgsi_info.h | 39 /* This enum describes how an opcode calculates its result. */ 41 /** The opcode produces no result. */ 44 /** When this opcode writes to a channel of the destination register, 52 /** This opcode writes the same value to all enabled channels of the 59 /** The operation performed by this opcode is dependent on which channel 82 uint opcode; member in struct:tgsi_opcode_info 86 tgsi_get_opcode_info( uint opcode ); 89 tgsi_get_opcode_name( uint opcode ); 104 tgsi_opcode_infer_src_type( uint opcode ); 107 tgsi_opcode_infer_dst_type( uint opcode ); [all...] |
/external/mesa3d/src/gallium/auxiliary/tgsi/ |
tgsi_info.h | 39 /* This enum describes how an opcode calculates its result. */ 41 /** The opcode produces no result. */ 44 /** When this opcode writes to a channel of the destination register, 52 /** This opcode writes the same value to all enabled channels of the 59 /** The operation performed by this opcode is dependent on which channel 82 uint opcode; member in struct:tgsi_opcode_info 86 tgsi_get_opcode_info( uint opcode ); 89 tgsi_get_opcode_name( uint opcode ); 104 tgsi_opcode_infer_src_type( uint opcode ); 107 tgsi_opcode_infer_dst_type( uint opcode ); [all...] |
/external/smali/dexlib/src/main/java/org/jf/dexlib/Code/ |
Instruction.java | 36 public final Opcode opcode; field in class:Instruction 44 return opcode.format.size/2; 47 protected Instruction(Opcode opcode) { 48 this.opcode = opcode; 63 opcode.name + " instruction"); 69 public Instruction makeInstruction(DexFile dexFile, Opcode opcode, byte[] buffer, int bufferIndex) [all...] |
/external/chromium_org/net/websockets/ |
websocket_frame.h | 25 typedef int OpCode; 40 // Return true if |opcode| is one of the data opcodes known to this 42 static bool IsKnownDataOpCode(OpCode opcode) { 43 return opcode == kOpCodeContinuation || opcode == kOpCodeText || 44 opcode == kOpCodeBinary; 47 // Return true if |opcode| is one of the control opcodes known to this 49 static bool IsKnownControlOpCode(OpCode opcode) { 84 OpCode opcode; member in struct:net::WebSocketFrameHeader [all...] |