| /external/llvm/lib/Target/ARM/ |
| ARMAsmPrinter.h | 56 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O,
59 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
62 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
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| ARMAsmPrinter.cpp | 324 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
326 const MachineOperand &MO = MI->getOperand(OpNum);
406 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
416 return AsmPrinter::PrintAsmOperand(MI, OpNum, AsmVariant, ExtraCode, O);
418 if (MI->getOperand(OpNum).isReg()) {
420 << ARMInstPrinter::getRegisterName(MI->getOperand(OpNum).getReg())
426 if (!MI->getOperand(OpNum).isImm())
428 O << MI->getOperand(OpNum).getImm();
432 printOperand(MI, OpNum, O);
435 if (MI->getOperand(OpNum).isReg())
[all...] |
| Thumb2SizeReduction.cpp | 378 unsigned OpNum = 3; // First 'rest' of operands.
416 OpNum = 4;
437 OpNum = 0;
446 OpNum = 2;
454 OpNum = 0;
461 OpNum = 2;
511 for (unsigned e = MI->getNumOperands(); OpNum != e; ++OpNum)
512 MIB.addOperand(MI->getOperand(OpNum));
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreAsmPrinter.cpp | 61 void printInlineJT(const MachineInstr *MI, int opNum, raw_ostream &O,
63 void printInlineJT32(const MachineInstr *MI, int opNum, raw_ostream &O) {
64 printInlineJT(MI, opNum, O, ".jmptable32");
66 void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
190 printInlineJT(const MachineInstr *MI, int opNum, raw_ostream &O,
192 unsigned JTI = MI->getOperand(opNum).getIndex();
206 void XCoreAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
208 const MachineOperand &MO = MI->getOperand(opNum);
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| /external/llvm/lib/Target/Hexagon/ |
| HexagonVLIWPacketizer.cpp | 482 for(unsigned opNum = 0; opNum < MI->getNumOperands(); opNum++)
483 if (MI->getOperand(opNum).isReg() &&
484 MI->getOperand(opNum).isDef()) {
485 DefRegsSet[MI->getOperand(opNum).getReg()] = 1;
488 for(unsigned opNum = 0; opNum < MI->getNumOperands(); opNum++)
489 if (MI->getOperand(opNum).isReg() &
[all...] |
| /external/llvm/include/llvm/MC/MCParser/ |
| MCParsedAsmOperand.h | 37 void setMCOperandNum (unsigned OpNum) { MCOperandNum = OpNum; }
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64AsmPrinter.h | 51 bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
54 bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
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| /external/llvm/lib/Target/XCore/InstPrinter/ |
| XCoreInstPrinter.cpp | 38 printInlineJT(const MCInst *MI, int opNum, raw_ostream &O) {
43 printInlineJT32(const MCInst *MI, int opNum, raw_ostream &O) {
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| /external/llvm/utils/PerfectShuffle/ |
| PerfectShuffle.cpp | 106 unsigned short OpNum;
110 Operator(unsigned short shufflemask, const char *name, unsigned opnum,
112 : ShuffleMask(shufflemask), OpNum(opnum), Name(name), Cost(cost) {
303 for (unsigned opnum = 0, e = TheOperators.size(); opnum != e; ++opnum) {
304 Operator *Op = TheOperators[opnum];
394 unsigned OpNum = ShufTab[i].Op ? ShufTab[i].Op->OpNum : 0
[all...] |
| /external/chromium_org/third_party/sqlite/src/src/ |
| test7.c | 56 volatile int opnum; /* Operation number */ member in struct:Thread
96 while( p->opnum<=p->completed ) sched_yield();
104 while( p->opnum<=p->completed ) sched_yield();
168 threadset[i].opnum = 1;
186 while( p->opnum>p->completed ) sched_yield();
223 p->opnum++;
511 threadset[i].opnum++;
562 threadset[i].opnum++;
606 threadset[i].opnum++;
650 threadset[i].opnum++
[all...] |
| test4.c | 34 int opnum; /* Operation number */ member in struct:Thread
74 while( p->opnum<=p->completed ) sched_yield();
82 while( p->opnum<=p->completed ) sched_yield();
146 threadset[i].opnum = 1;
163 while( p->opnum>p->completed ) sched_yield();
200 p->opnum++;
480 threadset[i].opnum++;
531 threadset[i].opnum++;
575 threadset[i].opnum++;
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| /external/chromium_org/third_party/icu/source/i18n/ |
| plurrule.cpp | 339 (curAndConstraint->opNum == -1 ) ) {
340 curAndConstraint->opNum=getNumberValue(token);
523 opNum=-1;
534 this->opNum=other.opNum;
560 value = (int32_t)value % opNum;
605 return uprv_max(opNum, maxLimit);
758 uprv_itou(digitString,16, andRule->opNum,10,0);
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| plurrule_impl.h | 156 int32_t opNum;
|
| /external/llvm/lib/Target/R600/InstPrinter/ |
| AMDGPUInstPrinter.cpp | 48 void AMDGPUInstPrinter::printInterpSlot(const MCInst *MI, unsigned OpNum,
50 unsigned Imm = MI->getOperand(OpNum).getImm();
|
| AMDGPUInstPrinter.h | 36 void printInterpSlot(const MCInst *MI, unsigned OpNum, raw_ostream &O);
|
| /external/llvm/lib/CodeGen/ |
| RegAllocFast.cpp | 74 unsigned short LastOpNum; // OpNum on LastUse.
189 LiveRegMap::iterator defineVirtReg(MachineInstr *MI, unsigned OpNum,
191 LiveRegMap::iterator reloadVirtReg(MachineInstr *MI, unsigned OpNum,
194 bool setPhysReg(MachineInstr *MI, unsigned OpNum, unsigned PhysReg);
579 RAFast::defineVirtReg(MachineInstr *MI, unsigned OpNum,
604 LRI->LastOpNum = OpNum;
612 RAFast::reloadVirtReg(MachineInstr *MI, unsigned OpNum,
619 MachineOperand &MO = MI->getOperand(OpNum);
655 LRI->LastOpNum = OpNum;
660 // setPhysReg - Change operand OpNum in MI the refer the PhysReg, considerin
[all...] |
| /external/icu4c/i18n/ |
| plurrule_impl.h | 148 int32_t opNum;
|
| plurrule.cpp | 408 (curAndConstraint->opNum == -1 ) ) {
409 curAndConstraint->opNum=getNumberValue(token);
760 opNum=-1;
771 this->opNum=other.opNum;
802 value = (int32_t)value % opNum;
852 return uprv_max(opNum, maxLimit);
1021 uprv_itou(digitString,16, andRule->opNum,10,0);
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetSelectionDAG.td | 22 class SDTypeConstraint<int opnum> {
23 int OperandNum = opnum;
27 class SDTCisVT<int OpNum, ValueType vt> : SDTypeConstraint<OpNum> {
31 class SDTCisPtrTy<int OpNum> : SDTypeConstraint<OpNum>;
34 class SDTCisInt<int OpNum> : SDTypeConstraint<OpNum>;
37 class SDTCisFP<int OpNum> : SDTypeConstraint<OpNum>;
[all...] |
| /dalvik/vm/mterp/ |
| gen-mterp.py | 204 dict.update({ "opcode":op, "opnum":i })
206 "_%(opcode)s /* 0x%(opnum)02x */\n" % dict)
334 dict.update({ "opcode":op, "opnum":opindex })
379 dict.update({ "opcode":op, "opnum":opindex })
393 dict.update({ "opcode":op, "opnum":opindex })
411 outfp.write(prefix + "_%(opcode)s: /* 0x%(opnum)02x */\n" % dict)
|
| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCCodeEmitter.cpp | 264 unsigned getT2AddrModeSORegOpValue(const MCInst &MI, unsigned OpNum,
266 unsigned getT2AddrModeImm8OpValue(const MCInst &MI, unsigned OpNum,
268 unsigned getT2AddrModeImm8OffsetOpValue(const MCInst &MI, unsigned OpNum,
270 unsigned getT2AddrModeImm12OffsetOpValue(const MCInst &MI, unsigned OpNum,
[all...] |
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.cpp | 548 unsigned OpNum = Ops[0];
550 .getRegClass(MI->getOperand(OpNum).getReg())->getSize() &&
559 if (OpNum == 0) {
567 if (OpNum == 1) {
584 if (OpNum == 0 && MI->hasOneMemOperand()) {
609 if (OpNum == NumOps - 1) {
616 for (unsigned I = 0; I < OpNum; ++I)
|
| /prebuilts/python/darwin-x86/2.7.5/lib/python2.7/compiler/ |
| pyassem.py | 510 lnotab.addCode(self.opnum[opname])
518 lnotab.addCode(self.opnum[opname], lo, hi)
521 print self.opnum[opname], lo, hi
525 opnum = {} variable in class:PyFlowGraph
527 opnum[dis.opname[num]] = num
|
| /prebuilts/python/linux-x86/2.7.5/lib/python2.7/compiler/ |
| pyassem.py | 510 lnotab.addCode(self.opnum[opname])
518 lnotab.addCode(self.opnum[opname], lo, hi)
521 print self.opnum[opname], lo, hi
525 opnum = {} variable in class:PyFlowGraph
527 opnum[dis.opname[num]] = num
|
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.h | 370 unsigned getPartialRegUpdateClearance(const MachineInstr *MI, unsigned OpNum,
372 void breakPartialRegDependency(MachineBasicBlock::iterator MI, unsigned OpNum,
377 unsigned OpNum,
|
