| /external/grub/netboot/ |
| ni5010.c | 65 #define EDLC_TDR2 (ioaddr + 0x0f) /* "Time Domain Reflectometry" reg2 */
|
| /external/llvm/lib/MC/ |
| MCDwarf.cpp | [all...] |
| /external/v8/src/mips/ |
| macro-assembler-mips.h | 223 void Swap(Register reg1, Register reg2, Register scratch = no_reg);
432 Register reg2);
[all...] |
| /prebuilts/ndk/9/sources/cxx-stl/EH/gabi++/libs/x86/ |
| libgabi++_shared.so | |
| /art/compiler/dex/quick/arm/ |
| int_arm.cc | 474 RegLocation ArmMir2Lir::GenDivRem(RegLocation rl_dest, int reg1, int reg2,
497 void ArmMir2Lir::OpLea(int rBase, int reg1, int reg2, int scale, int offset) {
[all...] |
| /dalvik/vm/compiler/codegen/ |
| RallocUtil.cpp | 105 void dvmCompilerFlushRegWide(CompilationUnit *cUnit, int reg1, int reg2)
108 RegisterInfo *info2 = getRegInfo(cUnit, reg2);
|
| /external/llvm/lib/CodeGen/ |
| AggressiveAntiDepBreaker.cpp | 79 unsigned AggressiveAntiDepState::UnionGroups(unsigned Reg1, unsigned Reg2)
86 unsigned Group2 = GetGroup(Reg2);
[all...] |
| StrongPHIElimination.cpp | 438 void StrongPHIElimination::unionRegs(unsigned Reg1, unsigned Reg2) {
440 Node *Node2 = RegNodeMap[Reg2]->getLeader();
|
| /external/libpcap/ |
| gencode.c | [all...] |
| /art/compiler/dex/quick/ |
| gen_common.cc | 77 LIR* Mir2Lir::GenRegRegCheck(ConditionCode c_code, int reg1, int reg2,
79 LIR* tgt = RawLIR(0, kPseudoThrowTarget, kind, current_dalvik_offset_, reg1, reg2);
80 LIR* branch = OpCmpBranch(c_code, reg1, reg2, tgt);
[all...] |
| /external/qemu/tcg/ |
| tcg.c | [all...] |
| /external/v8/src/arm/ |
| macro-assembler-arm.h | 129 Register reg2,
[all...] |
| regexp-macro-assembler-arm.cc | 436 int reg2,
439 __ ldr(r1, register_location(reg2));
[all...] |
| /art/compiler/utils/x86/ |
| assembler_x86.cc | 803 void X86Assembler::testl(Register reg1, Register reg2) {
806 EmitRegisterOperand(reg1, reg2);
[all...] |
| /external/chromium_org/v8/src/x64/ |
| lithium-codegen-x64.cc | 1124 Register reg2 = ToRegister(instr->result()); local
4113 Register reg2 = ToRegister(instr->index()); local
[all...] |
| /external/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | 81 bool contains(unsigned Reg1, unsigned Reg2) const {
82 return MC->contains(Reg1, Reg2);
[all...] |
| /external/llvm/test/CodeGen/ARM/ |
| vmul.ll | 445 ; CHECK: vmull.u8 [[REG1:(q[0-9]+)]], d{{.*}}, [[REG2:(d[0-9]+)]]
446 ; CHECK: vmlal.u8 [[REG1]], d{{.*}}, [[REG2]]
|
| /external/v8/src/ia32/ |
| regexp-macro-assembler-ia32.cc | 486 int reg2,
489 __ cmp(eax, register_location(reg2));
[all...] |
| /external/v8/src/x64/ |
| regexp-macro-assembler-x64.cc | 527 int reg2,
530 __ cmpq(rax, register_location(reg2));
[all...] |
| /dalvik/vm/compiler/codegen/arm/Thumb/ |
| Factory.cpp | 36 int reg1, int reg2, int dOffset,
|
| /dalvik/vm/compiler/codegen/mips/Mips32/ |
| Factory.cpp | 41 int reg1, int reg2, int dOffset,
|
| /external/llvm/utils/TableGen/ |
| CodeGenRegisters.cpp | [all...] |
| /external/valgrind/main/VEX/priv/ |
| host_amd64_defs.h | 126 Aam_IRRS /* Immediate + Reg1 + (Reg2 << Shift) */
|
| host_mips_defs.h | 184 Mam_RR /* Reg1 + Reg2 */
|
| host_s390_isel.c | 2089 HReg reg1, reg2; local
[all...] |
