| /prebuilts/ndk/9/platforms/android-5/arch-arm/usr/include/asm/ |
| locks.h | 17 #define __down_op(ptr,fail) ({ __asm__ __volatile__( "@ down_op\n" "1: ldrex lr, [%0]\n" " sub lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " teq lr, #0\n" " movmi ip, %0\n" " blmi " #fail : : "r" (ptr), "I" (1) : "ip", "lr", "cc"); smp_mb(); })
19 #define __down_op_ret(ptr,fail) ({ unsigned int ret; __asm__ __volatile__( "@ down_op_ret\n" "1: ldrex lr, [%1]\n" " sub lr, lr, %2\n" " strex ip, lr, [%1]\n" " teq ip, #0\n" " bne 1b\n" " teq lr, #0\n" " movmi ip, %1\n" " movpl ip, #0\n" " blmi " #fail "\n" " mov %0, ip" : "=&r" (ret) : "r" (ptr), "I" (1) : "ip", "lr", "cc"); smp_mb(); ret; })
21 #define __up_op(ptr,wake) ({ smp_mb(); __asm__ __volatile__( "@ up_op\n" "1: ldrex lr, [%0]\n" " add lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " cmp lr, #0\n" " movle ip, %0\n" " blle " #wake : : "r" (ptr), "I" (1) : "ip", "lr", "cc"); })
26 #define __down_op_write(ptr,fail) ({ __asm__ __volatile__( "@ down_op_write\n" "1: ldrex lr, [%0]\n" " sub lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " teq lr, #0\n" " movne ip, %0\n" " blne " #fail : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
28 #define __up_op_write(ptr,wake) ({ smp_mb(); __asm__ __volatile__( "@ up_op_write\n" "1: ldrex lr, [%0]\n" " adds lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " movcs ip, %0\n" " blcs " #wake : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); })
32 #define __up_op_read(ptr,wake) ({ smp_mb(); __asm__ __volatile__( "@ up_op_read\n" "1: ldrex lr, [%0]\n" " add lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " teq lr, #0\n" " moveq ip, %0\n" " bleq " #wake : : "r" (ptr), "I" (1) : "ip", "lr", "cc"); })
36 #define __down_op(ptr,fail) ({ __asm__ __volatile__( "@ down_op\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " subs lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movmi ip, %0\n" " blmi " #fail : : "r" (ptr), "I" (1) : "ip", "lr", "cc"); smp_mb(); })
38 #define __down_op_ret(ptr,fail) ({ unsigned int ret; __asm__ __volatile__( "@ down_op_ret\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%1]\n" " subs lr, lr, %2\n" " str lr, [%1]\n" " msr cpsr_c, ip\n" " movmi ip, %1\n" " movpl ip, #0\n" " blmi " #fail "\n" " mov %0, ip" : "=&r" (ret) : "r" (ptr), "I" (1) : "ip", "lr", "cc"); smp_mb(); ret; })
40 #define __up_op(ptr,wake) ({ smp_mb(); __asm__ __volatile__( "@ up_op\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " adds lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movle ip, %0\n" " blle " #wake : : "r" (ptr), "I" (1) : "ip", "lr", "cc"); })
45 #define __down_op_write(ptr,fail) ({ __asm__ __volatile__( "@ down_op_write\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " subs lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movne ip, %0\n" " blne " #fail : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
[all...] |
| /prebuilts/ndk/9/platforms/android-8/arch-arm/usr/include/asm/ |
| locks.h | 17 #define __down_op(ptr,fail) ({ __asm__ __volatile__( "@ down_op\n" "1: ldrex lr, [%0]\n" " sub lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " teq lr, #0\n" " movmi ip, %0\n" " blmi " #fail : : "r" (ptr), "I" (1) : "ip", "lr", "cc"); smp_mb(); })
19 #define __down_op_ret(ptr,fail) ({ unsigned int ret; __asm__ __volatile__( "@ down_op_ret\n" "1: ldrex lr, [%1]\n" " sub lr, lr, %2\n" " strex ip, lr, [%1]\n" " teq ip, #0\n" " bne 1b\n" " teq lr, #0\n" " movmi ip, %1\n" " movpl ip, #0\n" " blmi " #fail "\n" " mov %0, ip" : "=&r" (ret) : "r" (ptr), "I" (1) : "ip", "lr", "cc"); smp_mb(); ret; })
21 #define __up_op(ptr,wake) ({ smp_mb(); __asm__ __volatile__( "@ up_op\n" "1: ldrex lr, [%0]\n" " add lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " cmp lr, #0\n" " movle ip, %0\n" " blle " #wake : : "r" (ptr), "I" (1) : "ip", "lr", "cc"); })
26 #define __down_op_write(ptr,fail) ({ __asm__ __volatile__( "@ down_op_write\n" "1: ldrex lr, [%0]\n" " sub lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " teq lr, #0\n" " movne ip, %0\n" " blne " #fail : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
28 #define __up_op_write(ptr,wake) ({ smp_mb(); __asm__ __volatile__( "@ up_op_write\n" "1: ldrex lr, [%0]\n" " adds lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " movcs ip, %0\n" " blcs " #wake : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); })
32 #define __up_op_read(ptr,wake) ({ smp_mb(); __asm__ __volatile__( "@ up_op_read\n" "1: ldrex lr, [%0]\n" " add lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " teq lr, #0\n" " moveq ip, %0\n" " bleq " #wake : : "r" (ptr), "I" (1) : "ip", "lr", "cc"); })
36 #define __down_op(ptr,fail) ({ __asm__ __volatile__( "@ down_op\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " subs lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movmi ip, %0\n" " blmi " #fail : : "r" (ptr), "I" (1) : "ip", "lr", "cc"); smp_mb(); })
38 #define __down_op_ret(ptr,fail) ({ unsigned int ret; __asm__ __volatile__( "@ down_op_ret\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%1]\n" " subs lr, lr, %2\n" " str lr, [%1]\n" " msr cpsr_c, ip\n" " movmi ip, %1\n" " movpl ip, #0\n" " blmi " #fail "\n" " mov %0, ip" : "=&r" (ret) : "r" (ptr), "I" (1) : "ip", "lr", "cc"); smp_mb(); ret; })
40 #define __up_op(ptr,wake) ({ smp_mb(); __asm__ __volatile__( "@ up_op\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " adds lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movle ip, %0\n" " blle " #wake : : "r" (ptr), "I" (1) : "ip", "lr", "cc"); })
45 #define __down_op_write(ptr,fail) ({ __asm__ __volatile__( "@ down_op_write\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " subs lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movne ip, %0\n" " blne " #fail : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
[all...] |
| /prebuilts/ndk/9/platforms/android-9/arch-arm/usr/include/asm/ |
| locks.h | 17 #define __down_op(ptr,fail) ({ __asm__ __volatile__( "@ down_op\n" "1: ldrex lr, [%0]\n" " sub lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " teq lr, #0\n" " movmi ip, %0\n" " blmi " #fail : : "r" (ptr), "I" (1) : "ip", "lr", "cc"); smp_mb(); })
19 #define __down_op_ret(ptr,fail) ({ unsigned int ret; __asm__ __volatile__( "@ down_op_ret\n" "1: ldrex lr, [%1]\n" " sub lr, lr, %2\n" " strex ip, lr, [%1]\n" " teq ip, #0\n" " bne 1b\n" " teq lr, #0\n" " movmi ip, %1\n" " movpl ip, #0\n" " blmi " #fail "\n" " mov %0, ip" : "=&r" (ret) : "r" (ptr), "I" (1) : "ip", "lr", "cc"); smp_mb(); ret; })
21 #define __up_op(ptr,wake) ({ smp_mb(); __asm__ __volatile__( "@ up_op\n" "1: ldrex lr, [%0]\n" " add lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " cmp lr, #0\n" " movle ip, %0\n" " blle " #wake : : "r" (ptr), "I" (1) : "ip", "lr", "cc"); })
26 #define __down_op_write(ptr,fail) ({ __asm__ __volatile__( "@ down_op_write\n" "1: ldrex lr, [%0]\n" " sub lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " teq lr, #0\n" " movne ip, %0\n" " blne " #fail : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
28 #define __up_op_write(ptr,wake) ({ smp_mb(); __asm__ __volatile__( "@ up_op_write\n" "1: ldrex lr, [%0]\n" " adds lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " movcs ip, %0\n" " blcs " #wake : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); })
32 #define __up_op_read(ptr,wake) ({ smp_mb(); __asm__ __volatile__( "@ up_op_read\n" "1: ldrex lr, [%0]\n" " add lr, lr, %1\n" " strex ip, lr, [%0]\n" " teq ip, #0\n" " bne 1b\n" " teq lr, #0\n" " moveq ip, %0\n" " bleq " #wake : : "r" (ptr), "I" (1) : "ip", "lr", "cc"); })
36 #define __down_op(ptr,fail) ({ __asm__ __volatile__( "@ down_op\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " subs lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movmi ip, %0\n" " blmi " #fail : : "r" (ptr), "I" (1) : "ip", "lr", "cc"); smp_mb(); })
38 #define __down_op_ret(ptr,fail) ({ unsigned int ret; __asm__ __volatile__( "@ down_op_ret\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%1]\n" " subs lr, lr, %2\n" " str lr, [%1]\n" " msr cpsr_c, ip\n" " movmi ip, %1\n" " movpl ip, #0\n" " blmi " #fail "\n" " mov %0, ip" : "=&r" (ret) : "r" (ptr), "I" (1) : "ip", "lr", "cc"); smp_mb(); ret; })
40 #define __up_op(ptr,wake) ({ smp_mb(); __asm__ __volatile__( "@ up_op\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " adds lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movle ip, %0\n" " blle " #wake : : "r" (ptr), "I" (1) : "ip", "lr", "cc"); })
45 #define __down_op_write(ptr,fail) ({ __asm__ __volatile__( "@ down_op_write\n" " mrs ip, cpsr\n" " orr lr, ip, #128\n" " msr cpsr_c, lr\n" " ldr lr, [%0]\n" " subs lr, lr, %1\n" " str lr, [%0]\n" " msr cpsr_c, ip\n" " movne ip, %0\n" " blne " #fail : : "r" (ptr), "I" (RW_LOCK_BIAS) : "ip", "lr", "cc"); smp_mb(); })
[all...] |
| /external/kernel-headers/original/asm-arm/ |
| spinlock.h | 43 smp_mb();
59 smp_mb();
68 smp_mb();
107 smp_mb();
123 smp_mb();
132 smp_mb();
177 smp_mb();
184 smp_mb();
214 smp_mb();
|
| /external/kernel-headers/original/asm-generic/ |
| mutex-xchg.h | 31 smp_mb();
50 smp_mb();
70 smp_mb();
113 smp_mb();
|
| /prebuilts/ndk/4/platforms/android-5/arch-x86/usr/include/asm/ |
| system_32.h | 25 #define smp_mb() barrier() macro
|
| /prebuilts/ndk/4/platforms/android-8/arch-x86/usr/include/asm/ |
| system_32.h | 25 #define smp_mb() barrier() macro
|
| /prebuilts/ndk/6/platforms/android-9/arch-x86/usr/include/asm/ |
| system_32.h | 25 #define smp_mb() barrier() macro
|
| /prebuilts/ndk/7/platforms/android-14/arch-x86/usr/include/asm/ |
| system_32.h | 25 #define smp_mb() barrier() macro
|
| /prebuilts/ndk/7/platforms/android-9/arch-x86/usr/include/asm/ |
| system_32.h | 25 #define smp_mb() barrier() macro
|
| /bionic/libc/kernel/arch-mips/asm/ |
| barrier.h | 39 #define smp_mb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") macro
42 #define set_mb(var, value) do { var = value; smp_mb(); } while (0)
|
| /development/ndk/platforms/android-9/arch-mips/include/asm/ |
| barrier.h | 39 #define smp_mb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") macro
42 #define set_mb(var, value) do { var = value; smp_mb(); } while (0)
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/ |
| barrier.h | 39 #define smp_mb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") macro
42 #define set_mb(var, value) do { var = value; smp_mb(); } while (0)
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/ |
| barrier.h | 39 #define smp_mb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") macro
42 #define set_mb(var, value) do { var = value; smp_mb(); } while (0)
|
| /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/ |
| barrier.h | 39 #define smp_mb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") macro
42 #define set_mb(var, value) do { var = value; smp_mb(); } while (0)
|
| /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/ |
| barrier.h | 39 #define smp_mb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") macro
42 #define set_mb(var, value) do { var = value; smp_mb(); } while (0)
|
| /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/ |
| barrier.h | 39 #define smp_mb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") macro
42 #define set_mb(var, value) do { var = value; smp_mb(); } while (0)
|
| /external/kernel-headers/original/asm-mips/ |
| barrier.h | 144 #define smp_mb() __asm__ __volatile__(__WEAK_ORDERING_MB : : :"memory") macro
149 do { var = value; smp_mb(); } while (0)
|
| /bionic/libc/kernel/arch-x86/asm/ |
| system_32.h | 32 #define smp_mb() barrier() macro
|
| /development/ndk/platforms/android-9/arch-x86/include/asm/ |
| system_32.h | 32 #define smp_mb() barrier() macro
|
| /prebuilts/ndk/8/platforms/android-14/arch-x86/usr/include/asm/ |
| system_32.h | 32 #define smp_mb() barrier() macro
|
| /prebuilts/ndk/8/platforms/android-9/arch-x86/usr/include/asm/ |
| system_32.h | 32 #define smp_mb() barrier() macro
|
| /prebuilts/ndk/9/platforms/android-14/arch-x86/usr/include/asm/ |
| system_32.h | 32 #define smp_mb() barrier() macro
|
| /prebuilts/ndk/9/platforms/android-18/arch-x86/usr/include/asm/ |
| system_32.h | 32 #define smp_mb() barrier() macro
|
| /prebuilts/ndk/9/platforms/android-9/arch-x86/usr/include/asm/ |
| system_32.h | 32 #define smp_mb() barrier() macro
|
