| /external/mesa3d/src/mesa/main/ |
| atifragshader.h | 55 struct atifragshader_src_register SrcReg[2][3];
|
| /external/llvm/lib/Target/ARM/ |
| ARMFastISel.cpp | 186 bool ARMEmitStore(MVT VT, unsigned SrcReg, Address &Addr,
193 unsigned ARMEmitIntExt(MVT SrcVT, unsigned SrcReg, MVT DestVT, bool isZExt);
197 unsigned ARMMoveToFPReg(MVT VT, unsigned SrcReg);
198 unsigned ARMMoveToIntReg(MVT VT, unsigned SrcReg);
492 unsigned ARMFastISel::ARMMoveToFPReg(MVT VT, unsigned SrcReg) {
498 .addReg(SrcReg));
502 unsigned ARMFastISel::ARMMoveToIntReg(MVT VT, unsigned SrcReg) {
508 .addReg(SrcReg));
[all...] |
| ARMBaseInstrInfo.h | 111 unsigned DestReg, unsigned SrcReg,
116 unsigned SrcReg, bool isKill, int FrameIndex,
191 /// in SrcReg and SrcReg2 if having two register operands, and the value it
194 virtual bool analyzeCompare(const MachineInstr *MI, unsigned &SrcReg,
202 virtual bool optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg,
|
| ARMAsmPrinter.cpp | [all...] |
| /external/llvm/lib/CodeGen/ |
| RegisterCoalescer.cpp | 131 /// joinCopy - Attempt to join intervals corresponding to SrcReg/DstReg,
175 /// updateRegDefsUses - Replace all defs and uses of SrcReg to DstReg and
180 void updateRegDefsUses(unsigned SrcReg, unsigned DstReg, unsigned SubIdx);
253 SrcReg = DstReg = 0;
306 // SrcReg will be merged with a sub-register of DstReg.
310 // DstReg will be merged with a sub-register of SrcReg.
322 // Prefer SrcReg to be a sub-register of DstReg.
336 SrcReg = Src;
344 std::swap(SrcReg, DstReg);
357 // Find the virtual register that is SrcReg
[all...] |
| TailDuplication.cpp | 248 unsigned SrcReg = LI->second[j].second;
249 SSAUpdate.AddAvailableValue(SrcBB, SrcReg);
361 unsigned SrcReg = MI.getOperand(i).getReg();
362 UsedByPhi->insert(SrcReg);
393 unsigned SrcReg = MI->getOperand(SrcOpIdx).getReg();
395 LocalVRMap.insert(std::make_pair(DefReg, SrcReg));
400 Copies.push_back(std::make_pair(NewDef, SrcReg));
504 unsigned SrcReg = LI->second[j].second;
506 II->getOperand(Idx).setReg(SrcReg);
510 MIB.addReg(SrcReg).addMBB(SrcBB)
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
| r3xx_fragprog.c | 76 inst->SrcReg[i] = lmul_swizzle(RC_SWIZZLE_ZZZZ, inst->SrcReg[i]);
|
| radeon_program.h | 66 struct rc_src_register SrcReg[2];
78 struct rc_src_register SrcReg[3];
|
| radeon_inline_literals.c | 87 &inst->U.I.SrcReg[src_idx];
|
| /external/llvm/lib/Target/Mips/ |
| Mips16InstrInfo.h | 48 unsigned DestReg, unsigned SrcReg,
53 unsigned SrcReg, bool isKill, int FrameIndex,
|
| MipsSEInstrInfo.h | 49 unsigned DestReg, unsigned SrcReg,
54 unsigned SrcReg, bool isKill, int FrameIndex,
|
| MipsSEISelDAGToDAG.cpp | 406 unsigned RdhwrOpc, SrcReg, DestReg;
410 SrcReg = Mips::HWR29;
414 SrcReg = Mips::HWR29_64;
421 CurDAG->getRegister(SrcReg, PtrVT));
|
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| r3xx_fragprog.c | 76 inst->SrcReg[i] = lmul_swizzle(RC_SWIZZLE_ZZZZ, inst->SrcReg[i]);
|
| radeon_program.h | 66 struct rc_src_register SrcReg[2];
78 struct rc_src_register SrcReg[3];
|
| radeon_inline_literals.c | 87 &inst->U.I.SrcReg[src_idx];
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| R600InstrInfo.cpp | 51 unsigned DestReg, unsigned SrcReg,
55 && AMDGPU::R600_Reg128RegClass.contains(SrcReg)) {
60 .addReg(RI.getSubReg(SrcReg, SubRegIndex))
69 && !AMDGPU::R600_Reg128RegClass.contains(SrcReg));
72 .addReg(SrcReg, getKillRegState(KillSrc))
|
| AMDGPUInstrInfo.cpp | 37 unsigned &SrcReg, unsigned &DstReg,
124 unsigned SrcReg, bool isKill,
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| R600InstrInfo.cpp | 51 unsigned DestReg, unsigned SrcReg,
55 && AMDGPU::R600_Reg128RegClass.contains(SrcReg)) {
60 .addReg(RI.getSubReg(SrcReg, SubRegIndex))
69 && !AMDGPU::R600_Reg128RegClass.contains(SrcReg));
72 .addReg(SrcReg, getKillRegState(KillSrc))
|
| AMDGPUInstrInfo.cpp | 37 unsigned &SrcReg, unsigned &DstReg,
124 unsigned SrcReg, bool isKill,
|
| /external/llvm/lib/Target/X86/ |
| X86InstrInfo.cpp | [all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_vs_emit.c | 40 /* Return the SrcReg index of the channels that can be immediate float operands
259 if (inst->SrcReg[arg].File != PROGRAM_STATE_VAR &&
260 inst->SrcReg[arg].File != PROGRAM_CONSTANT &&
261 inst->SrcReg[arg].File != PROGRAM_UNIFORM &&
262 inst->SrcReg[arg].File != PROGRAM_ENV_PARAM &&
263 inst->SrcReg[arg].File != PROGRAM_LOCAL_PARAM) {
267 if (inst->SrcReg[arg].RelAddr) {
272 if (c->constant_map[inst->SrcReg[arg].Index] == -1) {
273 c->constant_map[inst->SrcReg[arg].Index] = constant++;
1055 const struct prog_src_register *src = &inst->SrcReg[argIndex]
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_vs_emit.c | 40 /* Return the SrcReg index of the channels that can be immediate float operands
259 if (inst->SrcReg[arg].File != PROGRAM_STATE_VAR &&
260 inst->SrcReg[arg].File != PROGRAM_CONSTANT &&
261 inst->SrcReg[arg].File != PROGRAM_UNIFORM &&
262 inst->SrcReg[arg].File != PROGRAM_ENV_PARAM &&
263 inst->SrcReg[arg].File != PROGRAM_LOCAL_PARAM) {
267 if (inst->SrcReg[arg].RelAddr) {
272 if (c->constant_map[inst->SrcReg[arg].Index] == -1) {
273 c->constant_map[inst->SrcReg[arg].Index] = constant++;
1055 const struct prog_src_register *src = &inst->SrcReg[argIndex]
[all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.cpp | 371 MachineInstr &MI = *II; // ; SPILL_CR <SrcReg>, <offset>
383 unsigned SrcReg = MI.getOperand(0).getReg();
386 // an MFOCRF to save all of the CRBits and, if needed, kill the SrcReg.
388 .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill()));
392 if (SrcReg != PPC::CR0) {
399 .addImm(getEncodingValue(SrcReg) * 4)
457 MachineInstr &MI = *II; // ; SPILL_VRSAVE <SrcReg>, <offset>
466 unsigned SrcReg = MI.getOperand(0).getReg();
469 .addReg(SrcReg, getKillRegState(MI.getOperand(0).isKill()));
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUInstrInfo.cpp | 38 unsigned &SrcReg, unsigned &DstReg,
105 unsigned SrcReg, bool isKill,
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZInstrInfo.h | 151 unsigned DestReg, unsigned SrcReg,
156 unsigned SrcReg, bool isKill, int FrameIndex,
|
