| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| i915_fragprog.c | 275 GLuint coord = src_vector( p, &inst->SrcReg[0], program); \
292 (N<1)?0:src_vector( p, &inst->SrcReg[0], program), \
293 (N<2)?0:src_vector( p, &inst->SrcReg[1], program), \
294 (N<3)?0:src_vector( p, &inst->SrcReg[2], program)); \
328 if (inst->SrcReg[a].File == PROGRAM_TEMPORARY) {
331 if (inst->SrcReg[a].Index >= I915_MAX_TEMPORARY)
334 regsUsed |= 1 << inst->SrcReg[a].Index;
337 const unsigned field = GET_SWZ(inst->SrcReg[a].Swizzle, c);
340 live_components[inst->SrcReg[a].Index] |= (1U << field);
414 src0 = src_vector(p, &inst->SrcReg[0], program)
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
| r200_fragshader.c | 42 const struct atifragshader_src_register srcReg,
45 const GLuint index = srcReg.Index;
46 const GLuint srcmod = srcReg.argMod;
47 const GLuint srcrep = srcReg.argRep;
170 inst->SrcReg[optype][0], 1, &tfactor);
172 inst->SrcReg[optype][1], 2, &tfactor);
180 inst->SrcReg[optype][0], 2, &tfactor);
185 inst->SrcReg[optype][2], 2, &tfactor);
189 inst->SrcReg[optype][0], 0, &tfactor);
191 inst->SrcReg[optype][1], 1, &tfactor)
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| r200_fragshader.c | 42 const struct atifragshader_src_register srcReg,
45 const GLuint index = srcReg.Index;
46 const GLuint srcmod = srcReg.argMod;
47 const GLuint srcrep = srcReg.argRep;
170 inst->SrcReg[optype][0], 1, &tfactor);
172 inst->SrcReg[optype][1], 2, &tfactor);
180 inst->SrcReg[optype][0], 2, &tfactor);
185 inst->SrcReg[optype][2], 2, &tfactor);
189 inst->SrcReg[optype][0], 0, &tfactor);
191 inst->SrcReg[optype][1], 1, &tfactor)
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/tests/ |
| radeon_compiler_util_tests.c | 26 &replace_inst.U.I.SrcReg[0],
27 &add_inst.U.I.SrcReg[0], &add_inst.U.I.SrcReg[1]);
|
| /external/mesa3d/src/gallium/drivers/r300/compiler/tests/ |
| radeon_compiler_util_tests.c | 26 &replace_inst.U.I.SrcReg[0],
27 &add_inst.U.I.SrcReg[0], &add_inst.U.I.SrcReg[1]);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 87 unsigned &SrcReg, unsigned &DstReg,
93 SrcReg = MI.getOperand(1).getReg();
532 unsigned DestReg, unsigned SrcReg,
535 if (PPC::GPRCRegClass.contains(DestReg, SrcReg))
537 else if (PPC::G8RCRegClass.contains(DestReg, SrcReg))
539 else if (PPC::F4RCRegClass.contains(DestReg, SrcReg))
541 else if (PPC::CRRCRegClass.contains(DestReg, SrcReg))
543 else if (PPC::VRRCRegClass.contains(DestReg, SrcReg))
545 else if (PPC::CRBITRCRegClass.contains(DestReg, SrcReg))
553 .addReg(SrcReg).addReg(SrcReg, getKillRegState(KillSrc))
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_program.c | 196 if (prog->Instructions[i].SrcReg[r].RelAddr &&
197 prog->Instructions[i].SrcReg[r].File == PROGRAM_INPUT) {
214 (prog->Instructions[i].SrcReg[0].RelAddr &&
215 prog->Instructions[i].SrcReg[0].File == PROGRAM_TEMPORARY) ||
216 (prog->Instructions[i].SrcReg[1].RelAddr &&
217 prog->Instructions[i].SrcReg[1].File == PROGRAM_TEMPORARY) ||
218 (prog->Instructions[i].SrcReg[2].RelAddr &&
219 prog->Instructions[i].SrcReg[2].File == PROGRAM_TEMPORARY)) {
|
| brw_wm_fp.c | 226 inst->SrcReg[0] = src0;
227 inst->SrcReg[1] = src1;
228 inst->SrcReg[2] = src2;
559 struct prog_src_register src0 = inst->SrcReg[0];
560 struct prog_src_register src1 = inst->SrcReg[1];
590 swz->SrcReg[0].Negate &= ~NEGATE_X;
623 struct prog_src_register src0 = inst->SrcReg[0];
649 swz->SrcReg[0].Negate = NEGATE_NONE;
688 struct prog_src_register src0 = inst->SrcReg[0];
701 out->SrcReg[0].Negate = NEGATE_NONE
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_program.c | 196 if (prog->Instructions[i].SrcReg[r].RelAddr &&
197 prog->Instructions[i].SrcReg[r].File == PROGRAM_INPUT) {
214 (prog->Instructions[i].SrcReg[0].RelAddr &&
215 prog->Instructions[i].SrcReg[0].File == PROGRAM_TEMPORARY) ||
216 (prog->Instructions[i].SrcReg[1].RelAddr &&
217 prog->Instructions[i].SrcReg[1].File == PROGRAM_TEMPORARY) ||
218 (prog->Instructions[i].SrcReg[2].RelAddr &&
219 prog->Instructions[i].SrcReg[2].File == PROGRAM_TEMPORARY)) {
|
| brw_wm_fp.c | 226 inst->SrcReg[0] = src0;
227 inst->SrcReg[1] = src1;
228 inst->SrcReg[2] = src2;
559 struct prog_src_register src0 = inst->SrcReg[0];
560 struct prog_src_register src1 = inst->SrcReg[1];
590 swz->SrcReg[0].Negate &= ~NEGATE_X;
623 struct prog_src_register src0 = inst->SrcReg[0];
649 swz->SrcReg[0].Negate = NEGATE_NONE;
688 struct prog_src_register src0 = inst->SrcReg[0];
701 out->SrcReg[0].Negate = NEGATE_NONE
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/program/ |
| prog_print.c | 594 const struct prog_src_register *srcReg,
598 const char *abs = srcReg->Abs ? "|" : "";
602 reg_string((gl_register_file) srcReg->File,
603 srcReg->Index, mode, srcReg->RelAddr, prog,
604 srcReg->HasIndex2, srcReg->RelAddr2, srcReg->Index2),
605 _mesa_swizzle_string(srcReg->Swizzle,
606 srcReg->Negate, GL_FALSE)
[all...] |
| prog_instruction.c | 46 inst[i].SrcReg[0].File = PROGRAM_UNDEFINED;
47 inst[i].SrcReg[0].Swizzle = SWIZZLE_NOOP;
48 inst[i].SrcReg[1].File = PROGRAM_UNDEFINED;
49 inst[i].SrcReg[1].Swizzle = SWIZZLE_NOOP;
50 inst[i].SrcReg[2].File = PROGRAM_UNDEFINED;
51 inst[i].SrcReg[2].Swizzle = SWIZZLE_NOOP;
318 if (inst->SrcReg[i].File == inst->DstReg.File &&
319 inst->SrcReg[i].Index == inst->DstReg.Index) {
325 GLuint swizzle = GET_SWZ(inst->SrcReg[i].Swizzle, chan);
|
| /external/mesa3d/src/mesa/program/ |
| prog_print.c | 594 const struct prog_src_register *srcReg,
598 const char *abs = srcReg->Abs ? "|" : "";
602 reg_string((gl_register_file) srcReg->File,
603 srcReg->Index, mode, srcReg->RelAddr, prog,
604 srcReg->HasIndex2, srcReg->RelAddr2, srcReg->Index2),
605 _mesa_swizzle_string(srcReg->Swizzle,
606 srcReg->Negate, GL_FALSE)
[all...] |
| prog_instruction.c | 46 inst[i].SrcReg[0].File = PROGRAM_UNDEFINED;
47 inst[i].SrcReg[0].Swizzle = SWIZZLE_NOOP;
48 inst[i].SrcReg[1].File = PROGRAM_UNDEFINED;
49 inst[i].SrcReg[1].Swizzle = SWIZZLE_NOOP;
50 inst[i].SrcReg[2].File = PROGRAM_UNDEFINED;
51 inst[i].SrcReg[2].Swizzle = SWIZZLE_NOOP;
318 if (inst->SrcReg[i].File == inst->DstReg.File &&
319 inst->SrcReg[i].Index == inst->DstReg.Index) {
325 GLuint swizzle = GET_SWZ(inst->SrcReg[i].Swizzle, chan);
|
| /external/llvm/lib/Target/Sparc/ |
| SparcInstrInfo.cpp | 274 unsigned DestReg, unsigned SrcReg,
276 if (SP::IntRegsRegClass.contains(DestReg, SrcReg))
278 .addReg(SrcReg, getKillRegState(KillSrc));
279 else if (SP::FPRegsRegClass.contains(DestReg, SrcReg))
281 .addReg(SrcReg, getKillRegState(KillSrc));
282 else if (SP::DFPRegsRegClass.contains(DestReg, SrcReg)) {
285 .addReg(SrcReg, getKillRegState(KillSrc));
293 unsigned Src = TRI->getSubReg(SrcReg, subRegIdx[i]);
301 MovMI->addRegisterKilled(SrcReg, TRI);
309 unsigned SrcReg, bool isKill, int FI
[all...] |
| /external/llvm/lib/CodeGen/ |
| StrongPHIElimination.cpp | 249 unsigned SrcReg = SrcMO.getReg();
250 addReg(SrcReg);
251 unionRegs(DestReg, SrcReg);
253 MachineInstr *DefMI = MRI->getVRegDef(SrcReg);
291 unsigned SrcReg = BBI->getOperand(i).getReg();
292 addReg(SrcReg);
293 unionRegs(DestReg, SrcReg);
308 unsigned SrcReg = PHI->getOperand(1).getReg();
309 unsigned SrcColor = getRegColor(SrcReg);
312 NewReg = SrcReg;
[all...] |
| PHIElimination.cpp | 358 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg();
361 isImplicitlyDefined(SrcReg, MRI);
362 assert(TargetRegisterInfo::isVirtualRegister(SrcReg) &&
378 findPHICopyInsertPoint(&opBlock, &MBB, SrcReg);
392 if (MachineInstr *DefMI = MRI->getVRegDef(SrcReg))
398 .addReg(SrcReg, 0, SrcSubReg);
402 // We only need to update the LiveVariables kill of SrcReg if this was the
403 // last PHI use of SrcReg to be lowered on this CFG edge and it is not live
406 !VRegPHIUseCount[BBVRegPair(opBlock.getNumber(), SrcReg)] &&
407 !LV->isLiveOut(SrcReg, opBlock))
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
| radeon_dataflow_deadcode.c | 43 unsigned char SrcReg[3];
186 unsigned int newsrcmask = srcmasks[src] & ~insts->SrcReg[src];
187 insts->SrcReg[src] |= newsrcmask;
191 refmask |= 1 << GET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan);
200 mark_used(s, inst->U.I.SrcReg[src].File, inst->U.I.SrcReg[src].Index, refmask);
202 if (inst->U.I.SrcReg[src].RelAddr)
260 ptr->U.I.SrcReg[src].File,
261 ptr->U.I.SrcReg[src].Index,
353 SET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan, RC_SWIZZLE_UNUSED)
[all...] |
| /external/llvm/lib/Target/NVPTX/ |
| NVPTXInstrInfo.cpp | 34 unsigned DestReg, unsigned SrcReg, bool KillSrc) const {
37 const TargetRegisterClass *SrcRC = MRI.getRegClass(SrcReg);
44 .addReg(SrcReg, getKillRegState(KillSrc));
47 .addReg(SrcReg, getKillRegState(KillSrc));
50 .addReg(SrcReg, getKillRegState(KillSrc));
53 .addReg(SrcReg, getKillRegState(KillSrc));
56 .addReg(SrcReg, getKillRegState(KillSrc));
59 .addReg(SrcReg, getKillRegState(KillSrc));
65 bool NVPTXInstrInfo::isMoveInstr(const MachineInstr &MI, unsigned &SrcReg,
80 SrcReg = src.getReg()
[all...] |
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| radeon_dataflow_deadcode.c | 43 unsigned char SrcReg[3];
186 unsigned int newsrcmask = srcmasks[src] & ~insts->SrcReg[src];
187 insts->SrcReg[src] |= newsrcmask;
191 refmask |= 1 << GET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan);
200 mark_used(s, inst->U.I.SrcReg[src].File, inst->U.I.SrcReg[src].Index, refmask);
202 if (inst->U.I.SrcReg[src].RelAddr)
260 ptr->U.I.SrcReg[src].File,
261 ptr->U.I.SrcReg[src].Index,
353 SET_SWZ(inst->U.I.SrcReg[src].Swizzle, chan, RC_SWIZZLE_UNUSED)
[all...] |
| /external/llvm/lib/Target/MSP430/ |
| MSP430InstrFormats.td | 30 def SrcReg : SourceMode<0>;
98 : IForm8<opcode, DstReg, SrcReg, Size2Bytes, outs, ins, asmstr, pattern>;
110 : IForm8<opcode, DstMem, SrcReg, Size4Bytes, outs, ins, asmstr, pattern>;
127 : IForm16<opcode, DstReg, SrcReg, Size2Bytes, outs, ins, asmstr, pattern>;
139 : IForm16<opcode, DstMem, SrcReg, Size4Bytes, outs, ins, asmstr, pattern>;
169 : IIForm8<opcode, SrcReg, Size2Bytes, outs, ins, asmstr, pattern>;
186 : IIForm16<opcode, SrcReg, Size2Bytes, outs, ins, asmstr, pattern>;
|
| /dalvik/vm/compiler/codegen/arm/FP/ |
| Thumb2VFP.cpp | 117 int srcReg;
164 srcReg = S2D(rlSrc.lowReg, rlSrc.highReg);
168 srcReg = rlSrc.lowReg;
174 srcReg);
179 newLIR2(cUnit, (ArmOpcode)op, rlResult.lowReg, srcReg);
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.cpp | 43 unsigned DestReg, unsigned SrcReg,
47 if (DestReg == AArch64::XSP || SrcReg == AArch64::XSP) {
50 .addReg(SrcReg)
53 } else if (DestReg == AArch64::WSP || SrcReg == AArch64::WSP) {
56 .addReg(SrcReg)
60 assert(AArch64::GPR64RegClass.contains(SrcReg));
64 .addReg(SrcReg);
65 } else if (SrcReg == AArch64::NZCV) {
71 assert(AArch64::GPR64RegClass.contains(SrcReg));
75 assert(AArch64::GPR32RegClass.contains(SrcReg));
[all...] |
| AArch64InstrInfo.h | 43 unsigned DestReg, unsigned SrcReg,
48 unsigned SrcReg, bool isKill, int FrameIndex,
97 unsigned DstReg, unsigned SrcReg, unsigned ScratchReg,
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| SIInstrInfo.cpp | 39 unsigned DestReg, unsigned SrcReg,
46 assert(DestReg != AMDGPU::SCC && SrcReg != AMDGPU::SCC);
49 .addReg(SrcReg, getKillRegState(KillSrc));
|
