| /external/llvm/test/CodeGen/Mips/ |
| return-vector.ll | 183 ; CHECK-DAG: swc1 $[[R0]], 12($4)
|
| /external/llvm/test/MC/Disassembler/Mips/ |
| mips32.txt | 407 # CHECK: swc1 $f9, 9158($7)
|
| mips32_le.txt | 413 # CHECK: swc1 $f9, 9158($7)
|
| mips32r2.txt | 410 # CHECK: swc1 $f9, 9158($7)
|
| mips32r2_le.txt | 410 # CHECK: swc1 $f9, 9158($7)
|
| /external/v8/src/mips/ |
| assembler-mips.cc | 1637 void Assembler::swc1(FPURegister fd, const MemOperand& src) { function in class:v8::Assembler
[all...] |
| disasm-mips.cc | 913 case SWC1:
914 Format(instr, "swc1 'ft, 'imm16s('rs)");
|
| constants-mips.h | 297 SWC1 = ((7 << 3) + 1) << kOpcodeShift,
|
| assembler-mips.h | 797 void swc1(FPURegister fs, const MemOperand& dst);
[all...] |
| simulator-mips.cc | [all...] |
| stub-cache-mips.cc | [all...] |
| /art/compiler/utils/mips/ |
| assembler_mips.cc | 417 void MipsAssembler::Swc1(FRegister ft, Register rs, uint16_t imm16) {
544 Swc1(reg, base, offset);
[all...] |
| /external/chromium_org/v8/src/mips/ |
| disasm-mips.cc | 923 case SWC1:
924 Format(instr, "swc1 'ft, 'imm16s('rs)");
|
| constants-mips.h | 300 SWC1 = ((7 << 3) + 1) << kOpcodeShift,
|
| assembler-mips.h | 753 void swc1(FPURegister fs, const MemOperand& dst);
[all...] |
| simulator-mips.cc | [all...] |
| /art/compiler/dex/quick/mips/ |
| mips_lir.h | 387 kMipsFswc1, // swc1 t,o(b) [111001] b[25..21] t[20..16] o[15..0].
|
| assemble_mips.cc | 384 "swc1", "!0s,!1d(!2r)", 4),
[all...] |
| /dalvik/vm/compiler/codegen/mips/ |
| MipsLIR.h | 481 kMipsFswc1, /* swc1 t,o(b) [111001] b[25..21] t[20..16] o[15..0] */
|
| /system/core/libpixelflinger/codeflinger/ |
| mips_disassem.c | 76 /*56 */ "sc ", "swc1", "swc2", "swc3", "scd", "sdc1", "sdc2", "sd "
|
| /external/qemu/elff/ |
| dwarf.h | [all...] |
| /ndk/sources/host-tools/ndk-stack/elff/ |
| dwarf.h | [all...] |
| /external/valgrind/main/VEX/priv/ |
| guest_mips_toIR.c | [all...] |
| host_mips_defs.c | [all...] |
| /external/qemu/ |
| mips-dis.c | [all...] |
