| /external/llvm/test/CodeGen/Mips/ |
| swzero.ll | 8 ; CHECK: swr $zero
|
| load-store-left-right.ll | 22 ; EL: swr $[[R0]], 0($[[R1]])
24 ; EB: swr $[[R0]], 3($[[R1]])
|
| mips64load-store-left-right.ll | 66 ; EL: swr $[[R0]], 0($[[R1]])
68 ; EB: swr $[[R0]], 3($[[R1]])
|
| /external/valgrind/main/none/tests/mips32/ |
| LoadStore.stdout.exp | 229 swr
230 swr $t0, 0($t1) :: RTval: 0x0, out: 0x0
231 swr $t0, 0($t1) :: RTval: 0x0, out: 0x0
232 swr $t0, 0($t1) :: RTval: 0x31415927, out: 0x31415927
233 swr $t0, 0($t1) :: RTval: 0x31415927, out: 0x31415927
234 swr $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x7fffffff
235 swr $t0, 0($t1) :: RTval: 0x7fffffff, out: 0x7fffffff
236 swr $t0, 0($t1) :: RTval: 0x80000000, out: 0x80000000
237 swr $t0, 0($t1) :: RTval: 0x80000000, out: 0x80000000
238 swr $t0, 2($t1) :: RTval: 0x80000000, out: 0x
[all...] |
| LoadStore.stdout.exp-BE | 229 swr
230 swr $t0, 0($t1) :: RTval: 0x0, out: 0x0
231 swr $t0, 0($t1) :: RTval: 0x0, out: 0x1f1e1f
232 swr $t0, 0($t1) :: RTval: 0x31415927, out: 0x27000000
233 swr $t0, 0($t1) :: RTval: 0x31415927, out: 0x271f1e1f
234 swr $t0, 0($t1) :: RTval: 0x7fffffff, out: 0xff000000
235 swr $t0, 0($t1) :: RTval: 0x7fffffff, out: 0xff1f1e1f
236 swr $t0, 0($t1) :: RTval: 0x80000000, out: 0x0
237 swr $t0, 0($t1) :: RTval: 0x80000000, out: 0x1f1e1f
238 swr $t0, 2($t1) :: RTval: 0x80000000, out: 0x
[all...] |
| LoadStore1.stdout.exp | 229 swr
230 swr $t0, 1($t1) :: RTval: 0x0, out: 0x0
231 swr $t0, 1($t1) :: RTval: 0x0, out: 0x1e1f00
232 swr $t0, 3($t1) :: RTval: 0x31415927, out: 0x27000000
233 swr $t0, 3($t1) :: RTval: 0x31415927, out: 0x27000000
234 swr $t0, 5($t1) :: RTval: 0x7fffffff, out: 0xff000000
235 swr $t0, 5($t1) :: RTval: 0x7fffffff, out: 0xff000000
236 swr $t0, 7($t1) :: RTval: 0x80000000, out: 0x0
237 swr $t0, 7($t1) :: RTval: 0x80000000, out: 0x0
238 swr $t0, 9($t1) :: RTval: 0x80000000, out: 0x
[all...] |
| LoadStore1.stdout.exp-LE | 229 swr
230 swr $t0, 1($t1) :: RTval: 0x0, out: 0x0
231 swr $t0, 1($t1) :: RTval: 0x0, out: 0x0
232 swr $t0, 3($t1) :: RTval: 0x31415927, out: 0x27
233 swr $t0, 3($t1) :: RTval: 0x31415927, out: 0x27
234 swr $t0, 5($t1) :: RTval: 0x7fffffff, out: 0xffffff
235 swr $t0, 5($t1) :: RTval: 0x7fffffff, out: 0x3ffffff
236 swr $t0, 7($t1) :: RTval: 0x80000000, out: 0x0
237 swr $t0, 7($t1) :: RTval: 0x80000000, out: 0x300
238 swr $t0, 9($t1) :: RTval: 0x80000000, out: 0x
[all...] |
| LoadStore.c | 53 // swr $t0, 0($t1)
62 "swr $t0, 0($t1) \n\t" \
252 printf("swr\n");
253 TESTINST1("swr $t0, 0($t1)", 0, 0, t0, t1);
254 TESTINST1("swr $t0, 0($t1)", 0x31415927, 0, t0, t1);
255 TESTINST1("swr $t0, 0($t1)", 0x7fffffff, 0, t0, t1);
256 TESTINST1("swr $t0, 0($t1)", 0x80000000, 0, t0, t1);
257 TESTINST1("swr $t0, 2($t1)", 0x80000000, 2, t0, t1);
258 TESTINST1("swr $t0, 6($t1)", 0x7fffffff, 6, t0, t1);
259 TESTINST1("swr $t0, 10($t1)", 0x7fffffff, 10, t0, t1)
[all...] |
| LoadStore1.c | 53 // swr $t0, 0($t1)
62 "swr $t0, 0($t1) \n\t" \
252 printf("swr\n");
253 TESTINST1("swr $t0, 1($t1)", 0, 1, t0, t1);
254 TESTINST1("swr $t0, 3($t1)", 0x31415927, 3, t0, t1);
255 TESTINST1("swr $t0, 5($t1)", 0x7fffffff, 5, t0, t1);
256 TESTINST1("swr $t0, 7($t1)", 0x80000000, 7, t0, t1);
257 TESTINST1("swr $t0, 9($t1)", 0x80000000, 9, t0, t1);
258 TESTINST1("swr $t0, 6($t1)", 0x7fffffff, 6, t0, t1);
259 TESTINST1("swr $t0, 11($t1)", 0x7fffffff, 11, t0, t1)
[all...] |
| /bionic/libc/arch-mips/include/machine/ |
| asm.h | 71 #define SWHI swr
80 #define SWLO swr
|
| /development/ndk/platforms/android-9/arch-mips/include/machine/ |
| asm.h | 71 #define SWHI swr
80 #define SWLO swr
|
| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/machine/ |
| asm.h | 71 #define SWHI swr
80 #define SWLO swr
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/machine/ |
| asm.h | 71 #define SWHI swr
80 #define SWLO swr
|
| /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/machine/ |
| asm.h | 71 #define SWHI swr
80 #define SWLO swr
|
| /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/machine/ |
| asm.h | 71 #define SWHI swr
80 #define SWLO swr
|
| /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/machine/ |
| asm.h | 71 #define SWHI swr
80 #define SWLO swr
|
| /system/core/libcutils/tests/memset_mips/ |
| memset_omips.S | 32 # define SWHI swr /* high part is right in little-endian */
|
| /bionic/libc/arch-mips/string/ |
| memset.S | 51 # define SWLO swr /* low part is right in big-endian */
55 # define SWHI swr /* high part is right in little-endian */
|
| memcpy.S | 53 # define SWLO swr /* low part is right in big-endian */
58 # define SWHI swr /* high part is right in little-endian */
|
| /external/qemu/target-mips/ |
| helper.h | 16 DEF_HELPER_3(swr, void, tl, tl, int)
|
| /external/chromium_org/v8/test/cctest/ |
| test-assembler-mips.cc | 831 // Test LWL, LWR, SWL and SWR instructions.
915 // Test all combinations of SWR and vAddr.
919 __ swr(t0, MemOperand(a0, OFFSET_OF(T, swr_0)) );
924 __ swr(t1, MemOperand(a0, OFFSET_OF(T, swr_1) + 1) );
929 __ swr(t2, MemOperand(a0, OFFSET_OF(T, swr_2) + 2) );
934 __ swr(t3, MemOperand(a0, OFFSET_OF(T, swr_3) + 3) );
[all...] |
| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 837 // Test LWL, LWR, SWL and SWR instructions.
920 // Test all combinations of SWR and vAddr.
924 __ swr(t0, MemOperand(a0, OFFSET_OF(T, swr_0)) );
929 __ swr(t1, MemOperand(a0, OFFSET_OF(T, swr_1) + 1) );
934 __ swr(t2, MemOperand(a0, OFFSET_OF(T, swr_2) + 2) );
939 __ swr(t3, MemOperand(a0, OFFSET_OF(T, swr_3) + 3) );
[all...] |
| /external/pixman/pixman/ |
| pixman-mips-memcpy-asm.S | 41 # define SWLO swr /* low part is right in big-endian */
44 # define SWHI swr /* high part is right in little-endian */
|
| /external/chromium_org/v8/src/mips/ |
| constants-mips.cc | 340 case SWR:
|
| /external/v8/src/mips/ |
| constants-mips.cc | 334 case SWR:
|
