| /dalvik/dx/tests/003-magic-version-access/ |
| class-version-45.0.txt | 2 # classfile with the lowest valid version, 45.0 (0x2d.0x00)
|
| class-version-48.0.txt | 2 # classfile with the valid version 48.0 (0x30.0x00)
|
| class-version-49.0.txt | 2 # classfile with the valid version 49.0 (0x31.0x00)
|
| class-version-50.0.txt | 2 # classfile with the valid version 50.0 (0x30.0x00)
|
| class-version-51.0.txt | 2 # classfile with the highest valid version 51.0 (0x33.0x00)
|
| class-version-51.1.txt | 3 # version. 51.0 (0x33.0x00)
|
| class-version-52.0.txt | 3 # than the highest valid version. 51.0 (0x33.0x00)
|
| /external/chromium/net/base/ |
| x509_cert_types_mac_unittest.cc | 162 0x0a, 0x1e, 0x81, 0x80, 0x00, 0x41, 0x00, 0x2d, 0x00, 0x54, 0x00, 0x72, 0x00,
163 0x75, 0x00, 0x73, 0x00, 0x74, 0x00, 0x20, 0x00, 0x47, 0x00, 0x65, 0x00, 0x73
[all...] |
| /external/chromium_org/third_party/icu/patches/ |
| csetdet.patch | 22 - if (input[0] == 0xFF && input[1] == 0xFE && (input[2] != 0x00 || input[3] != 0x00)) {
23 + if (length >= 4 && input[0] == 0xFF && input[1] == 0xFE && (input[2] != 0x00 || input[3] != 0x00)) {
|
| /external/clang/test/CodeGen/ |
| init-with-member-expr.c | 16 const mark_header_t rar_hdr[2] = {{0x52, 0x61, 0x72, 0x21, 0x1a, 0x07, 0x00}, {'U', 'n', 'i', 'q', 'u', 'E', '!'}};
|
| /external/oprofile/events/i386/ppro/ |
| unit_masks | 12 0x00 self-generated transactions
|
| /prebuilts/ndk/4/platforms/android-5/arch-x86/usr/include/linux/ |
| sfh7743.h | 19 #define SFH7743_IOCTL_GET_ENABLE _IOR(SFH7743_IO, 0x00, char)
|
| serial_reg.h | 29 #define UART_IIR_MSI 0x00
40 #define UART_FCR_R_TRIG_00 0x00
44 #define UART_FCR_T_TRIG_00 0x00
50 #define UART_FCR_TRIGGER_1 0x00
55 #define UART_FCR6_R_TRIGGER_8 0x00
59 #define UART_FCR6_T_TRIGGER_16 0x00
73 #define UART_LCR_WLEN5 0x00
141 #define UART_FCTR_RTS_NODELAY 0x00
147 #define UART_FCTR_TRGA 0x00
152 #define UART_FCTR_RX 0x00
[all...] |
| /prebuilts/ndk/4/platforms/android-8/arch-x86/usr/include/linux/ |
| sfh7743.h | 19 #define SFH7743_IOCTL_GET_ENABLE _IOR(SFH7743_IO, 0x00, char)
|
| serial_reg.h | 29 #define UART_IIR_MSI 0x00
40 #define UART_FCR_R_TRIG_00 0x00
44 #define UART_FCR_T_TRIG_00 0x00
50 #define UART_FCR_TRIGGER_1 0x00
55 #define UART_FCR6_R_TRIGGER_8 0x00
59 #define UART_FCR6_T_TRIGGER_16 0x00
73 #define UART_LCR_WLEN5 0x00
141 #define UART_FCTR_RTS_NODELAY 0x00
147 #define UART_FCTR_TRGA 0x00
152 #define UART_FCTR_RX 0x00
[all...] |
| /external/chromium_org/third_party/yasm/source/patched-yasm/ |
| x86insns.c | [all...] |
| /development/ndk/platforms/android-3/include/linux/ |
| serial_reg.h | 29 #define UART_IIR_MSI 0x00
40 #define UART_FCR_R_TRIG_00 0x00
44 #define UART_FCR_T_TRIG_00 0x00
50 #define UART_FCR_TRIGGER_1 0x00
55 #define UART_FCR6_R_TRIGGER_8 0x00
59 #define UART_FCR6_T_TRIGGER_16 0x00
73 #define UART_LCR_WLEN5 0x00
141 #define UART_FCTR_RTS_NODELAY 0x00
147 #define UART_FCTR_TRGA 0x00
152 #define UART_FCTR_RX 0x00
[all...] |
| /external/chromium_org/media/video/capture/win/ |
| sink_filter_win.cc | 15 0x30323449, 0x0000, 0x0010, { 0x80, 0x00, 0x00, 0xAA, 0x00, 0x38, 0x9B, 0x71}
|
| /external/dropbear/libtomcrypt/src/mac/pmac/ |
| pmac_test.c | 39 { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
42 { 0x00 },
52 { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
55 { 0x00, 0x01, 0x02 },
65 { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
68 { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
79 { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
82 { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
94 { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
97 { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07
[all...] |
| /external/wpa_supplicant_8/src/tls/ |
| pkcs1.c | 29 * (BT=0: PS=0x00, BT=1: PS=0xff, BT=2: PS=pseudorandom non-zero)
43 *pos++ = 0x00;
48 os_memset(pos, 0x00, ps_len);
62 if (*pos == 0x00)
72 *pos++ = 0x00;
148 plain[0] != 0x00 || (plain[1] != 0x00 && plain[1] != 0x01)) {
155 if (plain[1] == 0x00) {
157 if (plain[2] != 0x00) {
162 while (pos + 1 < plain + len && *pos == 0x00 && pos[1] == 0x00
[all...] |
| /hardware/ti/omap3/omx/image/src/openmax_il/jpeg_enc/test/ |
| JPEGTestEnc.c | 89 /* 0 */0, 0, 0, 0, 0x45, 0x78, 0x69, 0x66, 0x00, 0x00, /* Indicate Exif Data*/
93 0x2A, 0x00, /* Confirm "Intel" type byte align*/
95 /* 14 */ 0x08, 0x00, 0x00, 0x00, /* Offset to first IFDc*/
97 0x06, 0x00, /* Number of IFD as 1*/
101 0x02, 0x00, /* Type: Data format is 0x0002, ASCII */
103 0x0c, 0x00, 0x00, 0x00, /* Count: number of chars*
[all...] |
| /prebuilts/ndk/4/platforms/android-3/arch-arm/usr/include/linux/ |
| serial_reg.h | 29 #define UART_IIR_MSI 0x00
40 #define UART_FCR_R_TRIG_00 0x00
44 #define UART_FCR_T_TRIG_00 0x00
50 #define UART_FCR_TRIGGER_1 0x00
55 #define UART_FCR6_R_TRIGGER_8 0x00
59 #define UART_FCR6_T_TRIGGER_16 0x00
73 #define UART_LCR_WLEN5 0x00
141 #define UART_FCTR_RTS_NODELAY 0x00
147 #define UART_FCTR_TRGA 0x00
152 #define UART_FCTR_RX 0x00
[all...] |
| /prebuilts/ndk/4/platforms/android-4/arch-arm/usr/include/linux/ |
| serial_reg.h | 29 #define UART_IIR_MSI 0x00
40 #define UART_FCR_R_TRIG_00 0x00
44 #define UART_FCR_T_TRIG_00 0x00
50 #define UART_FCR_TRIGGER_1 0x00
55 #define UART_FCR6_R_TRIGGER_8 0x00
59 #define UART_FCR6_T_TRIGGER_16 0x00
73 #define UART_LCR_WLEN5 0x00
141 #define UART_FCTR_RTS_NODELAY 0x00
147 #define UART_FCTR_TRGA 0x00
152 #define UART_FCTR_RX 0x00
[all...] |
| /prebuilts/ndk/4/platforms/android-5/arch-arm/usr/include/linux/ |
| serial_reg.h | 29 #define UART_IIR_MSI 0x00
40 #define UART_FCR_R_TRIG_00 0x00
44 #define UART_FCR_T_TRIG_00 0x00
50 #define UART_FCR_TRIGGER_1 0x00
55 #define UART_FCR6_R_TRIGGER_8 0x00
59 #define UART_FCR6_T_TRIGGER_16 0x00
73 #define UART_LCR_WLEN5 0x00
141 #define UART_FCTR_RTS_NODELAY 0x00
147 #define UART_FCTR_TRGA 0x00
152 #define UART_FCTR_RX 0x00
[all...] |
| /prebuilts/ndk/4/platforms/android-8/arch-arm/usr/include/linux/ |
| serial_reg.h | 29 #define UART_IIR_MSI 0x00
40 #define UART_FCR_R_TRIG_00 0x00
44 #define UART_FCR_T_TRIG_00 0x00
50 #define UART_FCR_TRIGGER_1 0x00
55 #define UART_FCR6_R_TRIGGER_8 0x00
59 #define UART_FCR6_T_TRIGGER_16 0x00
73 #define UART_LCR_WLEN5 0x00
141 #define UART_FCTR_RTS_NODELAY 0x00
147 #define UART_FCTR_TRGA 0x00
152 #define UART_FCTR_RX 0x00
[all...] |
