| /prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/sgi/ |
| ioc.h | 54 #define SGINT_ISTAT0_PPORT 0x20
69 #define SGINT_ISTAT1_AFAIL 0x20
115 #define SGINT_TCWORD_CMSB 0x20
144 #define SGIOC_PANEL_VOLDNHOLD 0x20
169 #define SGIOC_DMASEL_SCLKEXT 0x20
180 #define SGIOC_RESET_LC1OFF 0x20
191 #define SGIOC_WRITE_U0AMODE 0x20
|
| /prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/sgi/ |
| ioc.h | 54 #define SGINT_ISTAT0_PPORT 0x20
69 #define SGINT_ISTAT1_AFAIL 0x20
115 #define SGINT_TCWORD_CMSB 0x20
144 #define SGIOC_PANEL_VOLDNHOLD 0x20
169 #define SGIOC_DMASEL_SCLKEXT 0x20
180 #define SGIOC_RESET_LC1OFF 0x20
191 #define SGIOC_WRITE_U0AMODE 0x20
|
| /prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/sgi/ |
| ioc.h | 54 #define SGINT_ISTAT0_PPORT 0x20
69 #define SGINT_ISTAT1_AFAIL 0x20
115 #define SGINT_TCWORD_CMSB 0x20
144 #define SGIOC_PANEL_VOLDNHOLD 0x20
169 #define SGIOC_DMASEL_SCLKEXT 0x20
180 #define SGIOC_RESET_LC1OFF 0x20
191 #define SGIOC_WRITE_U0AMODE 0x20
|
| /prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/sgi/ |
| ioc.h | 54 #define SGINT_ISTAT0_PPORT 0x20
69 #define SGINT_ISTAT1_AFAIL 0x20
115 #define SGINT_TCWORD_CMSB 0x20
144 #define SGIOC_PANEL_VOLDNHOLD 0x20
169 #define SGIOC_DMASEL_SCLKEXT 0x20
180 #define SGIOC_RESET_LC1OFF 0x20
191 #define SGIOC_WRITE_U0AMODE 0x20
|
| /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/sgi/ |
| ioc.h | 54 #define SGINT_ISTAT0_PPORT 0x20
69 #define SGINT_ISTAT1_AFAIL 0x20
115 #define SGINT_TCWORD_CMSB 0x20
144 #define SGIOC_PANEL_VOLDNHOLD 0x20
169 #define SGIOC_DMASEL_SCLKEXT 0x20
180 #define SGIOC_RESET_LC1OFF 0x20
191 #define SGIOC_WRITE_U0AMODE 0x20
|
| /external/kernel-headers/original/linux/ |
| serial_reg.h | 65 #define UART_FCR_T_TRIG_10 0x20
80 #define UART_FCR6_T_TRIGGER_24 0x20 /* Mask for transmit trigger set at 24 */
82 #define UART_FCR7_64BYTE 0x20 /* Go into 64 byte mode (TI16C750) */
91 #define UART_LCR_SPAR 0x20 /* Stick parity (?) */
103 #define UART_MCR_XONANY 0x20 /* Enable Xon Any (TI16C752, EFR[4]=1) */
104 #define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS (TI16C550C/TI16C750) */
113 #define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
123 #define UART_MSR_DSR 0x20 /* Data Set Ready */
145 #define UART_EFR_SCD 0x20 /* Special character detect */
178 #define UART_TRG_32 0x20
[all...] |
| ncp.h | 62 #define AR_EXCLUSIVE (cpu_to_le16(0x20))
79 #define RIM_EXT_ATTR_INFO (cpu_to_le32(0x20))
168 #define DM_ARCHIVE_DATE (cpu_to_le32(0x20))
|
| /external/llvm/test/MC/AArch64/ |
| neon-mul-div-instructions.s | 15 // CHECK: mul v0.8b, v1.8b, v2.8b // encoding: [0x20,0x9c,0x22,0x0e]
16 // CHECK: mul v0.16b, v1.16b, v2.16b // encoding: [0x20,0x9c,0x22,0x4e]
17 // CHECK: mul v0.4h, v1.4h, v2.4h // encoding: [0x20,0x9c,0x62,0x0e]
18 // CHECK: mul v0.8h, v1.8h, v2.8h // encoding: [0x20,0x9c,0x62,0x4e]
19 // CHECK: mul v0.2s, v1.2s, v2.2s // encoding: [0x20,0x9c,0xa2,0x0e]
20 // CHECK: mul v0.4s, v1.4s, v2.4s // encoding: [0x20,0x9c,0xa2,0x4e]
30 // CHECK: fmul v0.2s, v1.2s, v2.2s // encoding: [0x20,0xdc,0x22,0x2e]
31 // CHECK: fmul v0.4s, v1.4s, v2.4s // encoding: [0x20,0xdc,0x22,0x6e]
32 // CHECK: fmul v0.2d, v1.2d, v2.2d // encoding: [0x20,0xdc,0x62,0x6e]
41 // CHECK: fdiv v0.2s, v1.2s, v2.2s // encoding: [0x20,0xfc,0x22,0x2e
[all...] |
| /external/llvm/test/MC/PowerPC/ |
| ppc64-encoding-fp.s | 73 # CHECK: fadd 2, 3, 4 # encoding: [0xfc,0x43,0x20,0x2a]
75 # CHECK: fadd. 2, 3, 4 # encoding: [0xfc,0x43,0x20,0x2b]
77 # CHECK: fadds 2, 3, 4 # encoding: [0xec,0x43,0x20,0x2a]
79 # CHECK: fadds. 2, 3, 4 # encoding: [0xec,0x43,0x20,0x2b]
81 # CHECK: fsub 2, 3, 4 # encoding: [0xfc,0x43,0x20,0x28]
83 # CHECK: fsub. 2, 3, 4 # encoding: [0xfc,0x43,0x20,0x29]
85 # CHECK: fsubs 2, 3, 4 # encoding: [0xec,0x43,0x20,0x28]
87 # CHECK: fsubs. 2, 3, 4 # encoding: [0xec,0x43,0x20,0x29]
98 # CHECK: fdiv 2, 3, 4 # encoding: [0xfc,0x43,0x20,0x24]
100 # CHECK: fdiv. 2, 3, 4 # encoding: [0xfc,0x43,0x20,0x25
[all...] |
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/linux/ |
| serial_reg.h | 67 #define UART_FCR_T_TRIG_10 0x20
82 #define UART_FCR6_T_TRIGGER_24 0x20 /* Mask for transmit trigger set at 24 */
84 #define UART_FCR7_64BYTE 0x20 /* Go into 64 byte mode (TI16C750) */
93 #define UART_LCR_SPAR 0x20 /* Stick parity (?) */
105 #define UART_MCR_XONANY 0x20 /* Enable Xon Any (TI16C752, EFR[4]=1) */
106 #define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS (TI16C550C/TI16C750) */
115 #define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
126 #define UART_MSR_DSR 0x20 /* Data Set Ready */
148 #define UART_EFR_SCD 0x20 /* Special character detect */
181 #define UART_TRG_32 0x20
[all...] |
| ncp.h | 62 #define AR_EXCLUSIVE (cpu_to_le16(0x20))
79 #define RIM_EXT_ATTR_INFO (cpu_to_le32(0x20))
165 #define DM_ARCHIVE_DATE (cpu_to_le32(0x20))
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/linux/ |
| serial_reg.h | 67 #define UART_FCR_T_TRIG_10 0x20
82 #define UART_FCR6_T_TRIGGER_24 0x20 /* Mask for transmit trigger set at 24 */
84 #define UART_FCR7_64BYTE 0x20 /* Go into 64 byte mode (TI16C750) */
93 #define UART_LCR_SPAR 0x20 /* Stick parity (?) */
105 #define UART_MCR_XONANY 0x20 /* Enable Xon Any (TI16C752, EFR[4]=1) */
106 #define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS (TI16C550C/TI16C750) */
115 #define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
126 #define UART_MSR_DSR 0x20 /* Data Set Ready */
148 #define UART_EFR_SCD 0x20 /* Special character detect */
181 #define UART_TRG_32 0x20
[all...] |
| ncp.h | 62 #define AR_EXCLUSIVE (cpu_to_le16(0x20))
79 #define RIM_EXT_ATTR_INFO (cpu_to_le32(0x20))
165 #define DM_ARCHIVE_DATE (cpu_to_le32(0x20))
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/linux/ |
| serial_reg.h | 67 #define UART_FCR_T_TRIG_10 0x20
82 #define UART_FCR6_T_TRIGGER_24 0x20 /* Mask for transmit trigger set at 24 */
84 #define UART_FCR7_64BYTE 0x20 /* Go into 64 byte mode (TI16C750) */
93 #define UART_LCR_SPAR 0x20 /* Stick parity (?) */
105 #define UART_MCR_XONANY 0x20 /* Enable Xon Any (TI16C752, EFR[4]=1) */
106 #define UART_MCR_AFE 0x20 /* Enable auto-RTS/CTS (TI16C550C/TI16C750) */
115 #define UART_LSR_THRE 0x20 /* Transmit-hold-register empty */
126 #define UART_MSR_DSR 0x20 /* Data Set Ready */
148 #define UART_EFR_SCD 0x20 /* Special character detect */
181 #define UART_TRG_32 0x20
[all...] |
| ncp.h | 62 #define AR_EXCLUSIVE (cpu_to_le16(0x20))
79 #define RIM_EXT_ATTR_INFO (cpu_to_le32(0x20))
165 #define DM_ARCHIVE_DATE (cpu_to_le32(0x20))
|
| /external/yaffs2/yaffs2/ |
| yaffs_ecc.c | 130 t |= 0x20;
133 if (line_parity & 0x20)
135 if (line_parity_prime & 0x20)
149 t |= 0x20;
206 if (d1 & 0x20)
209 byte |= 0x20;
214 if (d0 & 0x20)
223 if (d2 & 0x20)
305 if (cDelta & 0x20)
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/sound/ |
| opl3.h | 73 #define OPL3_ENABLE_WAVE_SELECT 0x20
80 #define OPL3_TIMER2_MASK 0x20
90 #define OPL3_RIGHT_4OP_2 0x20
103 #define OPL3_PERCUSSION_ENABLE 0x20
114 * AM/VIB/EG/KSR/Multiple (0x20 to 0x35)
116 #define OPL3_REG_AM_VIB 0x20
119 #define OPL3_SUSTAIN_ON 0x20
162 #define OPL3_KEYON_BIT 0x20
217 #define OPL3_VOICE_TO_RIGHT 0x20
|
| ad1816a.h | 71 #define AD1816A_CHIP_CONFIG 0x20
93 #define AD1816A_TIMER_IRQ_PENDING 0x20
115 #define AD1816A_SRC_CD 0x20
|
| /prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/sound/ |
| opl3.h | 73 #define OPL3_ENABLE_WAVE_SELECT 0x20
80 #define OPL3_TIMER2_MASK 0x20
90 #define OPL3_RIGHT_4OP_2 0x20
103 #define OPL3_PERCUSSION_ENABLE 0x20
114 * AM/VIB/EG/KSR/Multiple (0x20 to 0x35)
116 #define OPL3_REG_AM_VIB 0x20
119 #define OPL3_SUSTAIN_ON 0x20
162 #define OPL3_KEYON_BIT 0x20
217 #define OPL3_VOICE_TO_RIGHT 0x20
|
| ad1816a.h | 71 #define AD1816A_CHIP_CONFIG 0x20
93 #define AD1816A_TIMER_IRQ_PENDING 0x20
115 #define AD1816A_SRC_CD 0x20
|
| /development/ndk/platforms/android-3/include/linux/ |
| ncp.h | 64 #define AR_EXCLUSIVE (cpu_to_le16(0x20))
79 #define RIM_EXT_ATTR_INFO (cpu_to_le32(0x20))
160 #define DM_ARCHIVE_DATE (cpu_to_le32(0x20))
|
| /external/skia/gm/ |
| lumafilter.cpp | 37 paint.setARGB(0x20, 0, 0, 0xff);
80 SkColor g1Colors[] = { kColor1, SkColorSetA(kColor1, 0x20) };
81 SkColor g2Colors[] = { kColor2, SkColorSetA(kColor2, 0x20) };
|
| /frameworks/av/media/libstagefright/codecs/on2/h264dec/omxdl/arm_neon/vc/m4p10/src_gcc/ |
| omxVCM4P10_DequantTransformResidualFromPairAndAdd_s.S | 18 SUB sp,sp,#0x20
92 ADD r10,r10,#0x20
116 ADD sp,sp,#0x20
|
| /prebuilts/ndk/4/platforms/android-3/arch-arm/usr/include/linux/ |
| ncp.h | 64 #define AR_EXCLUSIVE (cpu_to_le16(0x20))
79 #define RIM_EXT_ATTR_INFO (cpu_to_le32(0x20))
160 #define DM_ARCHIVE_DATE (cpu_to_le32(0x20))
|
| /prebuilts/ndk/4/platforms/android-4/arch-arm/usr/include/linux/ |
| ncp.h | 64 #define AR_EXCLUSIVE (cpu_to_le16(0x20))
79 #define RIM_EXT_ATTR_INFO (cpu_to_le32(0x20))
160 #define DM_ARCHIVE_DATE (cpu_to_le32(0x20))
|
