| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/svga/ |
| svga_tgsi.c | 119 unsigned opcode )
127 here->value = opcode;
|
| /external/chromium_org/third_party/mesa/src/src/glx/ |
| indirect_vertex_program.c | 65 get_parameter(unsigned opcode, unsigned size, GLenum target, GLuint index,
75 opcode, cmdlen);
|
| packsingle.h | 66 #define __GLX_SINGLE_BEGIN(opcode,bytes) \
72 req->glxCode = opcode; \
|
| /external/chromium_org/third_party/re2/re2/testing/ |
| backtrack.cc | 166 switch (ip->opcode()) {
168 LOG(FATAL) << "Unexpected opcode: " << (int)ip->opcode();
|
| /external/chromium_org/third_party/yasm/source/patched-yasm/modules/arch/lc3b/ |
| lc3bbc.c | 129 (unsigned int)insn->opcode);
177 /* Output opcode */
178 YASM_SAVE_16_L(*bufp, insn->opcode);
180 /* Insert immediate into opcode. */
|
| /external/javassist/src/test/test/javassist/bytecode/analysis/ |
| ScannerTest.java | 13 import javassist.bytecode.Opcode;
118 /* 12 */ addJump(code, Opcode.GOTO, 125);
122 /* 20 */ addJump(code, Opcode.GOTO, 125);
124 /* 25 */ addJump(code, Opcode.JSR, 31);
126 /* 30 */ code.addOpcode(Opcode.ATHROW);
130 /* 33 */ code.addOpcode(Opcode.LOOKUPSWITCH);
139 /* 66 */ addJump(code, Opcode.GOTO, 111);
141 /* 71 */ addJump(code, Opcode.JSR, 77);
143 /* 76 */ code.add(Opcode.ATHROW);
148 /* 85 */ addJump(code, Opcode.GOTO, 106)
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86FixupLEAs.cpp | 212 int opcode = MI->getOpcode(); local
214 int AddrOffset = X86II::getMemoryOperandNo(Desc.TSFlags, opcode);
|
| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| r500_fragprog_emit.c | 92 static unsigned int translate_rgb_op(struct r300_fragment_program_compiler *c, rc_opcode opcode)
94 switch(opcode) {
103 error("translate_rgb_op: unknown opcode %s\n", rc_get_opcode_info(opcode)->Name);
114 static unsigned int translate_alpha_op(struct r300_fragment_program_compiler *c, rc_opcode opcode)
116 switch(opcode) {
128 error("translate_alpha_op: unknown opcode %s\n", rc_get_opcode_info(opcode)->Name);
248 if (inst->RGB.Opcode == RC_OPCODE_DDX || inst->Alpha.Opcode == RC_OPCODE_DDX |
641 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
[all...] |
| /external/mesa3d/src/gallium/drivers/svga/ |
| svga_tgsi.c | 119 unsigned opcode )
127 here->value = opcode;
|
| /external/mesa3d/src/glx/ |
| indirect_vertex_program.c | 65 get_parameter(unsigned opcode, unsigned size, GLenum target, GLuint index,
75 opcode, cmdlen);
|
| packsingle.h | 66 #define __GLX_SINGLE_BEGIN(opcode,bytes) \
72 req->glxCode = opcode; \
|
| /external/proguard/src/proguard/evaluation/ |
| Processor.java | 79 switch (simpleInstruction.opcode)
550 throw new IllegalArgumentException("Unknown simple instruction ["+simpleInstruction.opcode+"]");
559 switch (constantInstruction.opcode)
629 throw new IllegalArgumentException("Unknown constant pool instruction ["+constantInstruction.opcode+"]");
638 switch (variableInstruction.opcode)
741 throw new IllegalArgumentException("Unknown variable instruction ["+variableInstruction.opcode+"]");
750 switch (branchInstruction.opcode)
[all...] |
| /external/regex-re2/re2/testing/ |
| backtrack.cc | 166 switch (ip->opcode()) {
168 LOG(FATAL) << "Unexpected opcode: " << (int)ip->opcode();
|
| /prebuilts/python/darwin-x86/2.7.5/lib/python2.7/ |
| dis.py | 6 from opcode import *
7 from opcode import __all__ as _opcodes_all
|
| /prebuilts/python/linux-x86/2.7.5/lib/python2.7/ |
| dis.py | 6 from opcode import *
7 from opcode import __all__ as _opcodes_all
|
| /system/core/libpixelflinger/ |
| pixelflinger.cpp | 580 static void ggl_logicOp(void* con, GGLenum opcode)
583 if ((opcode < GGL_CLEAR) || (opcode > GGL_SET)) {
587 if (c->state.logic_op.opcode != opcode) {
588 c->state.logic_op.opcode = opcode;
801 c->state.logic_op.opcode = GGL_COPY;
|
| /external/robolectric/lib/test/ |
| mockito-core-1.8.5.jar | |
| /art/compiler/utils/mips/ |
| assembler_mips.h | 481 void EmitR(int opcode, Register rs, Register rt, Register rd, int shamt, int funct);
482 void EmitI(int opcode, Register rs, Register rt, uint16_t imm);
483 void EmitJ(int opcode, int address);
484 void EmitFR(int opcode, int fmt, FRegister ft, FRegister fs, FRegister fd, int funct);
485 void EmitFI(int opcode, int fmt, FRegister rt, uint16_t imm);
|
| /external/valgrind/main/VEX/priv/ |
| guest_mips_toIR.c | 462 UInt opcode = get_opcode(cins); local
467 if (opcode == 0x07 || opcode == 0x06 || opcode == 0x05 || opcode == 0x04
468 || opcode == 0x03 || opcode == 0x02) {
473 if (opcode == 0x01 && rt == 0x01) {
478 if (opcode == 0x01 && rt == 0x11) {
483 if (opcode == 0x01 && rt == 0x10)
517 UInt opcode = get_opcode(cins); local
547 UInt opcode = get_opcode(cins); local
1201 UInt opcode, cins, rs, rt, rd, sa, ft, fs, fd, fmt, tf, nd, function, local
[all...] |
| /external/chromium_org/third_party/openssl/openssl/crypto/aes/asm/ |
| aesni-sha1-x86_64.pl | 121 { my $opcode = $AUTOLOAD; $opcode =~ s/.*:://;
124 $code .= "\t$opcode\t".join(',',$arg,reverse @_)."\n";
1220 local *opcode=shift;
1226 push @opcode,$rex|0x40 if($rex);
1231 my @opcode=(0x66);
1238 rex(\@opcode,$3,$2);
1239 push @opcode,0x0f,0x38,$opcodelet{$1};
1240 push @opcode,0xc0|($2&7)|(($3&7)<<3); # ModR/M
1241 return ".byte\t".join(',',@opcode);
[all...] |
| /external/openssl/crypto/aes/asm/ |
| aesni-sha1-x86_64.pl | 121 { my $opcode = $AUTOLOAD; $opcode =~ s/.*:://;
124 $code .= "\t$opcode\t".join(',',$arg,reverse @_)."\n";
1220 local *opcode=shift;
1226 push @opcode,$rex|0x40 if($rex);
1231 my @opcode=(0x66);
1238 rex(\@opcode,$3,$2);
1239 push @opcode,0x0f,0x38,$opcodelet{$1};
1240 push @opcode,0xc0|($2&7)|(($3&7)<<3); # ModR/M
1241 return ".byte\t".join(',',@opcode);
[all...] |
| /dalvik/vm/analysis/ |
| DexVerify.cpp | 76 * - opcode of first instruction begins at index 0
104 Opcode opcode = dexOpcodeFromCodeUnit(*insns); local
105 if (opcode == OP_NEW_INSTANCE)
107 if (opcode == OP_MONITOR_ENTER)
230 * - opcode of first instruction begins at index 0
820 switch (decInsn.opcode) {
[all...] |
| /external/qemu/target-mips/ |
| translate.c | 45 /* indirect opcode tables */
117 /* Reserved major opcode */
465 uint32_t opcode; member in struct:DisasContext
507 ctx->pc, ctx->opcode , ## __VA_ARGS__)
516 MIPS_DEBUG("Invalid %s %03x %03x %03x", op, ctx->opcode >> 26, \
517 ctx->opcode & 0x3F, ((ctx->opcode >> 16) & 0x1F)); \
835 opcode tables. */
[all...] |
| /art/compiler/dex/ |
| mir_dataflow.cc | 26 * instructions, where extended opcode at the MIR level are appended
882 int df_attributes = oat_data_flow_attributes_[mir->dalvikInsn.opcode];
997 int df_attributes = oat_data_flow_attributes_[mir->dalvikInsn.opcode];
1000 if (static_cast<int>(mir->dalvikInsn.opcode) <
1002 int flags = Instruction::FlagsOf(mir->dalvikInsn.opcode);
1191 Instruction::Code opcode = mir->dalvikInsn.opcode; local
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/ |
| radeon_pair_schedule.c | 255 else if (sinst->Instruction->U.P.Alpha.Opcode == RC_OPCODE_NOP)
257 else if (sinst->Instruction->U.P.RGB.Opcode == RC_OPCODE_NOP)
456 inst_begin->U.I.Opcode = RC_OPCODE_BEGIN_TEX;
511 assert(dst_full->Alpha.Opcode == RC_OPCODE_NOP);
529 info = rc_get_opcode_info(dst_full->RGB.Opcode);
602 const struct rc_opcode_info * opcode; local
604 assert(rgb->Alpha.Opcode == RC_OPCODE_NOP);
605 assert(alpha->RGB.Opcode == RC_OPCODE_NOP);
625 opcode = rc_get_opcode_info(alpha->Alpha.Opcode);
1316 const struct rc_opcode_info * opcode = rc_get_opcode_info(inst->U.I.Opcode); local
[all...] |
