| /external/mesa3d/src/gallium/drivers/r300/compiler/ |
| r300_fragprog_swizzle.c | 107 static int r300_swizzle_is_native(rc_opcode opcode, struct rc_src_register reg)
113 if (opcode == RC_OPCODE_KIL ||
114 opcode == RC_OPCODE_TEX ||
115 opcode == RC_OPCODE_TXB ||
116 opcode == RC_OPCODE_TXP) {
|
| /external/openssl/crypto/perlasm/ |
| x86nasm.pl | 14 { my $opcode=shift;
18 { if ($opcode =~ m/^j/o && $#_==0) # optimize jumps
20 elsif ($opcode eq "lea" && $#_==1) # wipe storage qualifier from lea
22 elsif ($opcode eq "clflush" && $#_==0)
25 &::emit($opcode,@_);
|
| /sdk/emulator/qtools/ |
| armdis.cpp | 6 #include "opcode.h"
45 Opcode opcode = decode(insn); local
46 switch (opcode) {
69 return disasm_alu(opcode, insn, ptr);
72 return disasm_branch(addr, opcode, insn, ptr);
90 return disasm_memblock(opcode, insn, ptr);
107 return disasm_mcr(opcode, insn, ptr);
109 return disasm_mla(opcode, insn, ptr);
115 return disasm_mul(opcode, insn, ptr)
761 uint8_t opcode = (insn >> 21) & 0x7; local
852 uint8_t opcode = (insn >> 21) & 0xf; local
[all...] |
| /art/compiler/dex/quick/mips/ |
| assemble_mips.cc | 26 * opcode: MipsOpCode enum
27 * skeleton: pre-designated bit-pattern for this opcode
41 #define ENCODING_MAP(opcode, skeleton, k0, ds, de, k1, s1s, s1e, k2, s2s, s2e, \
44 {k3, k3s, k3e}}, opcode, flags, name, fmt, size}
463 int opcode = lir->opcode; local
465 switch (opcode) {
471 case kMipsBeq: opcode = kMipsBne; break;
472 case kMipsBne: opcode = kMipsBeq; break;
473 case kMipsBeqz: opcode = kMipsBnez; break
[all...] |
| /external/bluetooth/bluedroid/stack/btu/ |
| btu_hcif.c | 154 UINT16 opcode; local
165 /* get command opcode */
166 STREAM_TO_UINT16 (opcode, p);
169 if ((opcode == HCI_RESET) || (opcode == HCI_HOST_NUM_PACKETS_DONE))
184 if ((opcode & HCI_GRP_VENDOR_SPECIFIC) == HCI_GRP_VENDOR_SPECIFIC
186 || (opcode == HCI_BLE_RAND )
187 || (opcode == HCI_BLE_ENCRYPT)
193 "Storing VSC callback opcode=0x%04x, Callback function=0x%07x",
194 opcode, *(UINT32 *)(p_buf + 1))
1431 UINT16 opcode; local
1530 UINT16 opcode; local
[all...] |
| /art/compiler/dex/quick/arm/ |
| assemble_arm.cc | 24 * opcode: ArmOpcode enum
25 * skeleton: pre-designated bit-pattern for this opcode
39 #define ENCODING_MAP(opcode, skeleton, k0, ds, de, k1, s1s, s1e, k2, s2s, s2e, \
42 {k3, k3s, k3e}}, opcode, flags, name, fmt, size}
[all...] |
| /external/chromium/sdch/open-vcdiff/src/ |
| encodetable_test.cc | 56 int opcode) {
57 g_exercise_code_table_->inst1[opcode] = inst1;
58 g_exercise_code_table_->mode1[opcode] = mode1;
59 g_exercise_code_table_->size1[opcode] = (inst1 == VCD_NOOP) ? 0 : size1;
60 g_exercise_code_table_->inst2[opcode] = inst2;
61 g_exercise_code_table_->mode2[opcode] = mode2;
62 g_exercise_code_table_->size2[opcode] = (inst2 == VCD_NOOP) ? 0 : size2;
67 int opcode = 0; local
86 AddExerciseOpcode(inst1, mode1, 0, inst2, mode2, 0, opcode++);
87 AddExerciseOpcode(inst1, mode1, 0, inst2, mode2, 255, opcode++)
[all...] |
| encodetable.cc | 107 // The VCDiff format allows each opcode to represent either
109 // examine the opcode generated by the last call to EncodeInstruction.
110 // If that opcode was a single-instruction opcode, this function checks
111 // whether there is a compound (double-instruction) opcode that can
114 // single-instruction opcode at position last_opcode_index_ will be
115 // overwritten with the new double-instruction opcode.
117 // In the majority of cases, no compound opcode will be possible,
118 // and a new single-instruction opcode will be appended to
120 // if the opcode does not implicitly give the instruction size
186 OpcodeOrNone opcode = kNoOpcode; local
[all...] |
| /external/chromium_org/net/websockets/ |
| websocket_basic_stream.cc | 294 const WebSocketFrameHeader::OpCode opcode = current_frame_header_->opcode; local
295 if (WebSocketFrameHeader::IsKnownControlOpCode(opcode)) {
298 DVLOG(1) << "WebSocket protocol error. Control frame, opcode=" << opcode
303 DVLOG(1) << "WebSocket protocol error. Control frame, opcode=" << opcode
313 DVLOG(2) << "Encountered a split control frame, opcode " << opcode;
367 const WebSocketFrameHeader::OpCode opcode = current_frame_header_->opcode; local
[all...] |
| /external/chromium_org/sdch/open-vcdiff/src/ |
| encodetable_test.cc | 55 int opcode) {
56 g_exercise_code_table_->inst1[opcode] = inst1;
57 g_exercise_code_table_->mode1[opcode] = mode1;
58 g_exercise_code_table_->size1[opcode] = (inst1 == VCD_NOOP) ? 0 : size1;
59 g_exercise_code_table_->inst2[opcode] = inst2;
60 g_exercise_code_table_->mode2[opcode] = mode2;
61 g_exercise_code_table_->size2[opcode] = (inst2 == VCD_NOOP) ? 0 : size2;
66 int opcode = 0; local
85 AddExerciseOpcode(inst1, mode1, 0, inst2, mode2, 0, opcode++);
86 AddExerciseOpcode(inst1, mode1, 0, inst2, mode2, 255, opcode++)
[all...] |
| encodetable.cc | 139 // The VCDiff format allows each opcode to represent either
141 // examine the opcode generated by the last call to EncodeInstruction.
142 // If that opcode was a single-instruction opcode, this function checks
143 // whether there is a compound (double-instruction) opcode that can
146 // single-instruction opcode at position last_opcode_index_ will be
147 // overwritten with the new double-instruction opcode.
149 // In the majority of cases, no compound opcode will be possible,
150 // and a new single-instruction opcode will be appended to
152 // if the opcode does not implicitly give the instruction size
218 OpcodeOrNone opcode = kNoOpcode; local
[all...] |
| /external/open-vcdiff/src/ |
| encodetable_test.cc | 55 int opcode) {
56 g_exercise_code_table_->inst1[opcode] = inst1;
57 g_exercise_code_table_->mode1[opcode] = mode1;
58 g_exercise_code_table_->size1[opcode] = (inst1 == VCD_NOOP) ? 0 : size1;
59 g_exercise_code_table_->inst2[opcode] = inst2;
60 g_exercise_code_table_->mode2[opcode] = mode2;
61 g_exercise_code_table_->size2[opcode] = (inst2 == VCD_NOOP) ? 0 : size2;
66 int opcode = 0; local
85 AddExerciseOpcode(inst1, mode1, 0, inst2, mode2, 0, opcode++);
86 AddExerciseOpcode(inst1, mode1, 0, inst2, mode2, 255, opcode++)
[all...] |
| encodetable.cc | 139 // The VCDiff format allows each opcode to represent either
141 // examine the opcode generated by the last call to EncodeInstruction.
142 // If that opcode was a single-instruction opcode, this function checks
143 // whether there is a compound (double-instruction) opcode that can
146 // single-instruction opcode at position last_opcode_index_ will be
147 // overwritten with the new double-instruction opcode.
149 // In the majority of cases, no compound opcode will be possible,
150 // and a new single-instruction opcode will be appended to
152 // if the opcode does not implicitly give the instruction size
218 OpcodeOrNone opcode = kNoOpcode; local
[all...] |
| /art/compiler/dex/ |
| mir_graph.cc | 282 switch (insn->dalvikInsn.opcode) {
307 LOG(FATAL) << "Unexpected opcode(" << insn->dalvikInsn.opcode << ") with kBranch set";
359 * int targets[size] branch targets, relative to switch opcode
363 if (insn->dalvikInsn.opcode == Instruction::PACKED_SWITCH) {
375 * int targets[size] branch targets, relative to switch opcode
393 (insn->dalvikInsn.opcode == Instruction::PACKED_SWITCH) ?
406 (insn->dalvikInsn.opcode == Instruction::PACKED_SWITCH) ?
461 if (insn->dalvikInsn.opcode == Instruction::THROW) {
495 insn->dalvikInsn.opcode
584 Instruction::Code opcode = insn->dalvikInsn.opcode; local
743 int opcode = mir->dalvikInsn.opcode; local
884 int opcode = insn.opcode; local
[all...] |
| local_value_numbering.cc | 24 uint16_t opcode = mir->dalvikInsn.opcode; local
25 switch (opcode) {
184 uint16_t res = LookupValue(opcode, operand1, NO_VALUE, NO_VALUE);
195 uint16_t res = LookupValue(opcode, operand1, NO_VALUE, NO_VALUE);
208 uint16_t res = LookupValue(opcode, operand1, NO_VALUE, NO_VALUE);
219 uint16_t res = LookupValue(opcode, operand1, NO_VALUE, NO_VALUE);
230 uint16_t res = LookupValue(opcode, operand1, operand2, NO_VALUE);
262 uint16_t res = LookupValue(opcode, operand1, operand2, NO_VALUE);
296 uint16_t res = LookupValue(opcode, operand1, operand2, NO_VALUE)
[all...] |
| /dalvik/dx/src/com/android/dx/io/ |
| Opcodes.java | 20 * All the Dalvik opcode value constants. See the related spec
21 * document for the meaning and instruction format of each opcode.
25 * pseudo-opcode used for nonstandard format payload "instructions". TODO:
32 * pseudo-opcode used to indicate there is no next opcode; used
33 * in opcode chaining lists
37 /** minimum valid opcode value */
40 /** maximum valid opcode value */
43 // BEGIN(opcodes); GENERATED AUTOMATICALLY BY opcode-gen
264 // TODO: Generate these payload opcodes with opcode-gen
[all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| CodegenDriver.cpp | 88 switch (mir->dalvikInsn.opcode) {
134 switch (mir->dalvikInsn.opcode) {
178 Opcode opcode = mir->dalvikInsn.opcode; local
180 switch (opcode) {
208 static void selfVerificationBranchInsert(LIR *currentLIR, ArmOpcode opcode,
212 insn->opcode = opcode;
247 TemplateOpcode opcode = TEMPLATE_MEM_OP_DECODE local
899 Opcode opcode = mir->dalvikInsn.opcode; local
1654 Opcode opcode = mir->dalvikInsn.opcode; local
1718 Opcode opcode = mir->dalvikInsn.opcode; local
1977 Opcode opcode = mir->dalvikInsn.opcode; local
2649 Opcode opcode = mir->dalvikInsn.opcode; local
2674 Opcode opcode = mir->dalvikInsn.opcode; local
[all...] |
| /development/tools/mkstubs/src/com/android/mkstubs/sourcer/ |
| MethodSourcer.java | 165 public void visitFieldInsn(int opcode, String owner, String name, String desc) {
180 public void visitInsn(int opcode) {
185 public void visitIntInsn(int opcode, int operand) {
190 public void visitJumpInsn(int opcode, Label label) {
226 public void visitMethodInsn(int opcode, String owner, String name, String desc) {
252 public void visitTypeInsn(int opcode, String type) {
257 public void visitVarInsn(int opcode, int var) {
|
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/tgsi/ |
| tgsi_ureg.h | 465 /* Generic instruction emitter. Use if you need to pass the opcode as
470 unsigned opcode,
479 unsigned opcode,
491 unsigned opcode,
508 unsigned opcode,
549 unsigned opcode = TGSI_OPCODE_##op; \
551 opcode, \
568 unsigned opcode = TGSI_OPCODE_##op; \
570 opcode, \
588 unsigned opcode = TGSI_OPCODE_##op;
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_vec4_copy_propagation.cpp | 42 return (inst->opcode == BRW_OPCODE_MOV &&
54 return (inst->opcode != BRW_OPCODE_DO &&
55 inst->opcode != BRW_OPCODE_WHILE &&
56 inst->opcode != BRW_OPCODE_ELSE &&
57 inst->opcode != BRW_OPCODE_ENDIF);
93 switch (inst->opcode) {
107 if (inst->opcode == BRW_OPCODE_MUL &&
|
| /external/llvm/lib/Transforms/Instrumentation/ |
| ProfilingUtils.cpp | 73 Instruction::CastOps opcode = CastInst::getCastOpcode(AI, false, ArgVTy, local
76 CastInst::Create(opcode, AI, ArgVTy, "argv.cast", InitCall));
87 Instruction::CastOps opcode; local
89 opcode = CastInst::getCastOpcode(InitCall, true, AI->getType(), true);
91 CastInst::Create(opcode, InitCall, AI->getType(), "", InsertPos));
93 opcode = CastInst::getCastOpcode(AI, true,
96 CastInst::Create(opcode, AI, Type::getInt32Ty(Context),
|
| /external/mesa3d/src/gallium/auxiliary/tgsi/ |
| tgsi_ureg.h | 465 /* Generic instruction emitter. Use if you need to pass the opcode as
470 unsigned opcode,
479 unsigned opcode,
491 unsigned opcode,
508 unsigned opcode,
549 unsigned opcode = TGSI_OPCODE_##op; \
551 opcode, \
568 unsigned opcode = TGSI_OPCODE_##op; \
570 opcode, \
588 unsigned opcode = TGSI_OPCODE_##op;
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_vec4_copy_propagation.cpp | 42 return (inst->opcode == BRW_OPCODE_MOV &&
54 return (inst->opcode != BRW_OPCODE_DO &&
55 inst->opcode != BRW_OPCODE_WHILE &&
56 inst->opcode != BRW_OPCODE_ELSE &&
57 inst->opcode != BRW_OPCODE_ENDIF);
93 switch (inst->opcode) {
107 if (inst->opcode == BRW_OPCODE_MUL &&
|
| /external/proguard/src/proguard/classfile/instruction/ |
| InstructionFactory.java | 39 byte opcode = code[index++];
42 if (opcode == InstructionConstants.OP_WIDE)
44 opcode = code[index++];
48 switch (opcode)
290 throw new IllegalArgumentException("Unknown instruction opcode ["+opcode+"] at offset "+offset);
293 instruction.opcode = opcode;
|
| /external/proguard/src/proguard/preverify/ |
| CodeSubroutineInliner.java | 254 byte opcode = variableInstruction.opcode;
255 if (opcode == InstructionConstants.OP_RET)
304 byte opcode = branchInstruction.opcode;
305 if (opcode == InstructionConstants.OP_JSR ||
306 opcode == InstructionConstants.OP_JSR_W)
|
