| /dalvik/vm/mterp/out/ |
| InterpAsm-armv5te-vfp.S | 165 * Put the instruction's opcode field into the specified register.
170 * Put the prefetched instruction's opcode field into the specified register.
175 * Begin executing the opcode in _reg. Because this only jumps within the
316 GET_INST_OPCODE(ip) @ extract opcode from rINST
364 GET_INST_OPCODE(ip) @ ip<- opcode from rINST
388 GET_INST_OPCODE(ip) @ ip<- opcode from rINST
402 GET_INST_OPCODE(ip) @ extract opcode from rINST
416 GET_INST_OPCODE(ip) @ extract opcode from rINST
434 GET_INST_OPCODE(ip) @ extract opcode from rINST
449 GET_INST_OPCODE(ip) @ extract opcode from rINS
[all...] |
| InterpAsm-armv7-a-neon.S | 165 * Put the instruction's opcode field into the specified register.
170 * Put the prefetched instruction's opcode field into the specified register.
175 * Begin executing the opcode in _reg. Because this only jumps within the
330 GET_INST_OPCODE(ip) @ extract opcode from rINST
378 GET_INST_OPCODE(ip) @ ip<- opcode from rINST
401 GET_INST_OPCODE(ip) @ ip<- opcode from rINST
415 GET_INST_OPCODE(ip) @ extract opcode from rINST
429 GET_INST_OPCODE(ip) @ extract opcode from rINST
445 GET_INST_OPCODE(ip) @ extract opcode from rINST
461 GET_INST_OPCODE(ip) @ extract opcode from rINS
[all...] |
| InterpAsm-armv7-a.S | 165 * Put the instruction's opcode field into the specified register.
170 * Put the prefetched instruction's opcode field into the specified register.
175 * Begin executing the opcode in _reg. Because this only jumps within the
330 GET_INST_OPCODE(ip) @ extract opcode from rINST
378 GET_INST_OPCODE(ip) @ ip<- opcode from rINST
401 GET_INST_OPCODE(ip) @ ip<- opcode from rINST
415 GET_INST_OPCODE(ip) @ extract opcode from rINST
429 GET_INST_OPCODE(ip) @ extract opcode from rINST
445 GET_INST_OPCODE(ip) @ extract opcode from rINST
461 GET_INST_OPCODE(ip) @ extract opcode from rINS
[all...] |
| /external/chromium_org/v8/src/mips/ |
| assembler-mips.h | 486 // Takes a branch opcode (cc) and a label (L) and generates
543 // Difference between address of current opcode and target address offset.
575 // Difference between address of current opcode and value read from pc
[all...] |
| /art/compiler/dex/quick/ |
| codegen_util.cc | 66 DCHECK(GetTargetInstFlags(lir->opcode) & (IS_LOAD | IS_STORE));
88 DCHECK(!(GetTargetInstFlags(lir->opcode) & IS_STORE));
122 switch (lir->opcode) {
181 std::string op_name(BuildInsnString(GetTargetInstName(lir->opcode),
183 std::string op_operands(BuildInsnString(GetTargetInstFmt(lir->opcode),
511 if (!tgt_lir->flags.is_nop && (tgt_lir->opcode == kPseudoSafepointPC)) {
515 if (!tgt_lir->flags.is_nop && (tgt_lir->opcode == kPseudoExportedPC)) {
701 if (lir->opcode >= 0) {
705 } else if (lir->opcode == kPseudoPseudoAlign4) {
800 new_label->opcode = kPseudoCaseLabel
[all...] |
| /art/compiler/dex/portable/ |
| mir_to_gbc.cc | 691 Instruction::Code opcode = mir->dalvikInsn.opcode; local
692 int op_val = opcode;
699 LOG(INFO) << ".. " << Instruction::Name(opcode) << " 0x" << std::hex << op_val;
708 int attrs = mir_graph_->oat_data_flow_attributes_[opcode];
743 switch (opcode) {
1499 UNIMPLEMENTED(FATAL) << "Unsupported Dex opcode 0x" << std::hex << opcode; local
1535 int opcode = mir->dalvikInsn.opcode; local
1709 int opcode = mir->dalvikInsn.opcode; local
[all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_from_sm4.cpp | 139 unsigned int getDstOpndCount(enum sm4_opcode opcode) const;
495 Converter::getDstOpndCount(enum sm4_opcode opcode) const
497 switch (opcode) {
850 switch (dcl.opcode) {
[all...] |
| /external/mesa3d/src/gallium/drivers/nv50/codegen/ |
| nv50_ir_from_sm4.cpp | 139 unsigned int getDstOpndCount(enum sm4_opcode opcode) const;
495 Converter::getDstOpndCount(enum sm4_opcode opcode) const
497 switch (opcode) {
850 switch (dcl.opcode) {
[all...] |
| /external/dexmaker/src/dx/java/com/android/dx/io/ |
| OpcodeInfo.java | 23 * Information about each Dalvik opcode.
35 * pseudo-opcode used for nonstandard formatted "instructions"
44 // TODO: These payload opcodes should be generated by opcode-gen.
61 // BEGIN(opcode-info-defs); GENERATED AUTOMATICALLY BY opcode-gen
1431 private final int opcode; field in class:OpcodeInfo.Info
[all...] |
| /dalvik/libdex/ |
| InstrUtils.cpp | 21 * automatically by the opcode-gen tool. Any edits to the generated
29 * Table that maps each opcode to the full width of instructions that
30 * use that opcode, in (16-bit) code units. Unimplemented opcodes as
31 * well as the "breakpoint" opcode have a width of zero.
34 // BEGIN(libdex-widths); GENERATED AUTOMATICALLY BY opcode-gen
55 * Table that maps each opcode to the flags associated with that
56 * opcode.
59 // BEGIN(libdex-flags); GENERATED AUTOMATICALLY BY opcode-gen
320 * Table that maps each opcode to the instruction format associated
321 * that opcode
493 Opcode opcode = dexOpcodeFromCodeUnit(inst); local
[all...] |
| /dalvik/vm/compiler/codegen/arm/Thumb2/ |
| Gen.cpp | 65 int opcode = TEMPLATE_PERIODIC_PROFILING; local
67 (int) gDvmJit.codeCache + templateEntryOffsets[opcode],
68 (int) gDvmJit.codeCache + templateEntryOffsets[opcode]);
70 (int) gDvmJit.codeCache + templateEntryOffsets[opcode],
71 (int) gDvmJit.codeCache + templateEntryOffsets[opcode]);
349 if (mir->dalvikInsn.opcode == OP_MONITOR_ENTER)
|
| /external/chromium_org/third_party/WebKit/Source/devtools/front_end/ |
| FilteredItemSelectionDialog.js | 438 var opcode = opcodes[i];
439 if (opcode[0] === "equal")
440 ranges.push(new WebInspector.SourceRange(opcode[3], opcode[4] - opcode[3]));
441 else if (opcode[0] !== "insert")
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_wm.c | 43 GLuint brw_wm_nr_args( GLuint opcode )
45 switch (opcode) {
60 assert(opcode < MAX_OPCODE);
61 return _mesa_num_inst_src_regs(opcode);
66 GLuint brw_wm_is_scalar_result( GLuint opcode )
68 switch (opcode) {
583 * This is only needed for the WM_WPOSXY opcode when the fragment program
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_wm.c | 43 GLuint brw_wm_nr_args( GLuint opcode )
45 switch (opcode) {
60 assert(opcode < MAX_OPCODE);
61 return _mesa_num_inst_src_regs(opcode);
66 GLuint brw_wm_is_scalar_result( GLuint opcode )
68 switch (opcode) {
583 * This is only needed for the WM_WPOSXY opcode when the fragment program
|
| /external/smali/dexlib/src/main/java/org/jf/dexlib/Code/ |
| Opcode.java | 35 public enum Opcode
37 NOP((short)0x00, "nop", ReferenceType.none, Format.Format10x, Opcode.CAN_CONTINUE),
38 MOVE((short)0x01, "move", ReferenceType.none, Format.Format12x, Opcode.CAN_CONTINUE | Opcode.SETS_REGISTER),
39 MOVE_FROM16((short)0x02, "move/from16", ReferenceType.none, Format.Format22x, Opcode.CAN_CONTINUE | Opcode.SETS_REGISTER),
40 MOVE_16((short)0x03, "move/16", ReferenceType.none, Format.Format32x, Opcode.CAN_CONTINUE | Opcode.SETS_REGISTER),
41 MOVE_WIDE((short)0x04, "move-wide", ReferenceType.none, Format.Format12x, Opcode.CAN_CONTINUE | Opcode.SETS_REGISTER | Opcode.SETS_WIDE_REGISTER)
382 opcodesByName.put(opcode.name.hashCode(), opcode); typedefs
420 opcodesByName.put(opcode.name.hashCode(), opcode); local
[all...] |
| /dalvik/dx/src/com/android/dx/ssa/back/ |
| SsaToRop.java | 282 Rop opcode = lastInsn.getOpcode(); local
284 if (opcode.getBranchingness() != Rop.BRANCH_RETURN
285 && opcode != Rops.THROW) {
|
| /device/lge/mako/camera/mm-camera-interface/ |
| mm_camera.h | 292 mm_camera_ops_type_t opcode, void *parm);
297 mm_camera_ops_type_t opcode, void *parm);
299 mm_camera_ops_type_t opcode, void *parm);
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/i915/ |
| i915_fpc_emit.c | 184 * \param opcode the instruction opcode
191 uint opcode,
239 i915_emit_texld( p, tmp, A0_DEST_CHANNEL_ALL, sampler, coord, opcode, num_coord );
260 *(p->csr++) = (opcode |
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/ |
| r300_tgsi_to_rc.c | 32 static unsigned translate_opcode(unsigned opcode)
34 switch(opcode) {
143 fprintf(stderr, "r300: Unknown TGSI/RC opcode: %s\n", tgsi_get_opcode_name(opcode));
277 dst->U.I.Opcode = translate_opcode(src->Instruction.Opcode);
372 if (inst->Instruction.Opcode == TGSI_OPCODE_END) {
|
| /external/dexmaker/src/dx/java/com/android/dx/ssa/back/ |
| SsaToRop.java | 283 Rop opcode = lastInsn.getOpcode(); local
285 if (opcode.getBranchingness() != Rop.BRANCH_RETURN
286 && opcode != Rops.THROW) {
|
| /external/llvm/test/MC/ARM/ |
| eh-directive-setfp.s | 10 @ The reconstruction code is implemented by two different unwind opcode:
11 @ (i) the unwind opcode to copy stack offset from the other register, and
12 @ (ii) the unwind opcode to add or substract the stack offset.
|
| /external/mesa3d/src/gallium/drivers/i915/ |
| i915_fpc_emit.c | 184 * \param opcode the instruction opcode
191 uint opcode,
239 i915_emit_texld( p, tmp, A0_DEST_CHANNEL_ALL, sampler, coord, opcode, num_coord );
260 *(p->csr++) = (opcode |
|
| /external/mesa3d/src/gallium/drivers/r300/ |
| r300_tgsi_to_rc.c | 32 static unsigned translate_opcode(unsigned opcode)
34 switch(opcode) {
143 fprintf(stderr, "r300: Unknown TGSI/RC opcode: %s\n", tgsi_get_opcode_name(opcode));
277 dst->U.I.Opcode = translate_opcode(src->Instruction.Opcode);
372 if (inst->Instruction.Opcode == TGSI_OPCODE_END) {
|
| /external/proguard/src/proguard/optimize/evaluation/ |
| EvaluationShrinker.java | 200 if (instruction.opcode == InstructionConstants.OP_GOTO &&
483 switch (constantInstruction.opcode)
566 switch (simpleInstruction.opcode)
618 if (variableInstruction.opcode < InstructionConstants.OP_ISTORE)
632 if (constantInstruction.opcode == InstructionConstants.OP_NEW)
646 if (branchInstruction.opcode == InstructionConstants.OP_JSR ||
647 branchInstruction.opcode == InstructionConstants.OP_JSR_W)
[all...] |
| /art/compiler/dex/ |
| mir_analysis.cc | 865 uint32_t ending_flags = analysis_attributes_[ending_bb->last_mir_insn->dalvikInsn.opcode];
868 ending_flags = analysis_attributes_[ending_bb->last_mir_insn->dalvikInsn.opcode];
894 if (static_cast<uint32_t>(mir->dalvikInsn.opcode) >= kMirOpFirst) {
898 uint32_t flags = analysis_attributes_[mir->dalvikInsn.opcode];
|
