| /external/llvm/lib/Target/ARM/ |
| Thumb2SizeReduction.cpp | 496 MachineInstrBuilder MIB = BuildMI(MBB, MI, dl, TII->get(Opc));
556 MachineInstrBuilder MIB = BuildMI(MBB, MI, MI->getDebugLoc(),
718 MachineInstrBuilder MIB = BuildMI(MBB, MI, dl, NewMCID);
814 MachineInstrBuilder MIB = BuildMI(MBB, MI, dl, NewMCID);
[all...] |
| ARMBaseRegisterInfo.cpp | 398 BuildMI(MBB, MBBI, dl, TII.get(ARM::LDRcp))
580 MachineInstrBuilder MIB = AddDefaultPred(BuildMI(*MBB, Ins, DL, MCID, BaseReg)
|
| /external/llvm/lib/Target/R600/ |
| R600EmitClauseMarkers.cpp | 202 BuildMI(MBB, ClauseHead, MBB.findDebugLoc(ClauseHead), TII->get(Opcode))
|
| R600InstrInfo.cpp | 717 BuildMI(&MBB, DL, get(AMDGPU::JUMP)).addMBB(TBB);
725 BuildMI(&MBB, DL, get(AMDGPU::JUMP_COND))
740 BuildMI(&MBB, DL, get(AMDGPU::JUMP_COND))
743 BuildMI(&MBB, DL, get(AMDGPU::JUMP)).addMBB(FBB);
[all...] |
| SIInsertWaits.cpp | 293 BuildMI(MBB, I, DebugLoc(), TII->get(AMDGPU::S_WAITCNT))
|
| /external/llvm/lib/Target/X86/ |
| X86FixupLEAs.cpp | 104 NewMI = BuildMI(*MF, MI->getDebugLoc(),
|
| /external/llvm/lib/CodeGen/ |
| MachineInstrBundle.cpp | 110 MachineInstrBuilder MIB = BuildMI(*MBB.getParent(), FirstMI->getDebugLoc(),
|
| MachineSSAUpdater.cpp | 118 return BuildMI(*BB, I, DebugLoc(), TII->get(Opcode), NewVR);
|
| TailDuplication.cpp | 825 Copies.push_back(BuildMI(*PredBB, Loc, DebugLoc(),
886 Copies.push_back(BuildMI(*PrevBB, Loc, DebugLoc(),
[all...] |
| GCStrategy.cpp | 357 BuildMI(MBB, MI, DL, TII->get(TargetOpcode::GC_LABEL)).addSym(Label);
|
| MachineRegisterInfo.cpp | 382 BuildMI(*EntryMBB, EntryMBB->begin(), DebugLoc(),
|
| PeepholeOptimizer.cpp | 284 MachineInstr *Copy = BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(),
|
| LiveDebugVariables.cpp | [all...] |
| RegAllocFast.cpp | 312 BuildMI(*MBB, MI, DL, TII->get(TargetOpcode::DBG_VALUE))
865 MachineInstr *NewDV = BuildMI(*MBB, MBB->erase(MI), DL,
[all...] |
| StrongPHIElimination.cpp | 695 MachineInstr *CopyInstr = BuildMI(*PredBB,
764 MachineInstr *CopyInstr = BuildMI(*MBB,
|
| TwoAddressInstructionPass.cpp | [all...] |
| InlineSpiller.cpp | [all...] |
| MachineBasicBlock.cpp | 370 BuildMI(*this, I, DebugLoc(), TII.get(TargetOpcode::COPY), VirtReg)
[all...] |
| SplitKit.cpp | 450 CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg)
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| ScheduleDAGSDNodes.cpp | 777 BuildMI(*BB, InsertPos, DebugLoc(), TII->get(TargetOpcode::COPY), Reg)
786 BuildMI(*BB, InsertPos, DebugLoc(), TII->get(TargetOpcode::COPY), VRBase)
[all...] |
| FunctionLoweringInfo.cpp | 177 BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
|
| SelectionDAGISel.cpp | 428 BuildMI(*EntryMBB, ++InsertPos, MI->getDebugLoc(),
449 BuildMI(*MF, CopyUseMI->getDebugLoc(),
830 BuildMI(*MBB, FuncInfo->InsertPt, SDB->getCurDebugLoc(), II)
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsDelaySlotFiller.cpp | 518 BuildMI(MBB, llvm::next(I), I->getDebugLoc(), TII->get(Mips::NOP));
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreISelLowering.cpp | [all...] |
