/external/llvm/lib/CodeGen/ |
PeepholeOptimizer.cpp | 138 /// optimizeExtInstr - If instruction is a copy-like instruction, i.e. it reads 219 // %reg1027 = COPY %reg1025:4 224 // the COPY here, it will give us the value after the <sext>, not the 252 std::copy(ExtendedUses.begin(), ExtendedUses.end(), 284 MachineInstr *Copy = BuildMI(*UseMBB, UseMI, UseMI->getDebugLoc(), 285 TII->get(TargetOpcode::COPY), NewVR) 289 Copy->getOperand(0).setSubReg(SubIdx); 290 Copy->getOperand(0).setIsUndef();
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StrongPHIElimination.cpp | 18 // Budimlic, et al. Fast copy coalescing and live-range identification. 102 /// in the copy insertion code. 165 // inserted copy instructions. 169 // Maps pairs of predecessor basic blocks and colors to their defining copy 175 // Maps inserted destination copy registers to their defining copy 280 // FIXME: Preserve the equivalence classes during copy insertion and use 335 // PHI destination copy. In this case, they have the same value and thus don't 348 && "PHI destination copy's live interval should be a single live " 349 "range from the beginning of the BB to the copy instruction.") [all...] |
TwoAddressInstructionPass.cpp | 336 /// isCopyToReg - Return true if the specified MI is a copy instruction or 391 /// %reg1034 = copy %reg1024 392 /// %reg1035 = copy %reg1025<kill> 398 /// coalescing eliminate the extra copy. 425 // If the def is something other than a copy, then it isn't going to 450 /// use, return the use instruction if it's a copy or a two-address use. 543 // Commute the ADD to hopefully eliminate an otherwise unavoidable copy. 610 // Turn ADD into a 3-address instruction to avoid a copy. 660 /// is a copy or a two-address instruction. 707 /// if it's a copy. For a copy instruction, we find the physical registers th [all...] |
MachineBasicBlock.cpp | 358 // Look for an existing copy. 370 BuildMI(*this, I, DebugLoc(), TII.get(TargetOpcode::COPY), VirtReg) [all...] |
SplitKit.cpp | 357 // cheap-as-a-copy remats anyway. 443 // Attempt cheap-as-a-copy rematerialization. 449 // Can't remat, just insert a copy from parent. 450 CopyMI = BuildMI(MBB, I, DebugLoc(), TII.get(TargetOpcode::COPY), LI->reg) 560 // In spill mode, make live ranges as short as possible by inserting the copy 562 // value. The inserted COPY is not a kill, and we don't need to recompute 563 // the source live range. The spiller also won't try to hoist this copy. 643 assert(MI && "No instruction for back-copy"); 742 // back-copies. If a single back-copy dominates, put it in DomPair.second. 768 // single back-copy [all...] |
/external/llvm/lib/Target/R600/ |
R600OptimizeVectorRegisters.cpp | 208 Pos = BuildMI(MBB, Pos, DL, TII->get(AMDGPU::COPY), Reg)
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/external/llvm/lib/Target/X86/ |
X86FastISel.cpp | 812 // Make the copy. 815 // Avoid a cross-class copy. This is very unlikely. 818 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), 825 // The x86-64 ABI for returning structs by value requires that we copy 827 // a virtual register in the entry block, so now we copy the value out 835 BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DL, TII.get(TargetOpcode::COPY), [all...] |
X86InstrInfo.cpp | [all...] |
X86ISelLowering.cpp | [all...] |
/external/mesa3d/src/gallium/drivers/radeon/ |
AMDILISelDAGToDAG.cpp | 166 unsigned int NewOpc = AMDGPU::COPY;
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R600ISelLowering.cpp | 101 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::COPY))
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/external/zlib/src/ |
gzlib.c | 394 if (state->mode == GZ_READ && state->how == COPY &&
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/sdk/eclipse/plugins/com.android.ide.eclipse.ddms/src/com/android/ide/eclipse/ddms/views/ |
OldLogCatView.java | 6 * You may obtain a copy of the License at 288 // setup the copy action 291 actionBars.setGlobalActionHandler(ActionFactory.COPY.getId(), new Action( 295 mLogPanel.copy(mClipboard);
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/external/llvm/lib/CodeGen/SelectionDAG/ |
ScheduleDAGSDNodes.cpp | 475 // emits a copy from the physical register to a virtual register unless 476 // it requires a cross class copy (cost < 0). That means we are only 477 // treating "expensive to copy" register dependency as physical register 527 // Check for phys reg copy. 637 // This copy is a liveout value. It is likely coalesced, so reduce the 649 dbgs() << "PHYS REG COPY\n"; 764 // Copy to physical register. 777 BuildMI(*BB, InsertPos, DebugLoc(), TII->get(TargetOpcode::COPY), Reg) 780 // Copy from physical register. 786 BuildMI(*BB, InsertPos, DebugLoc(), TII->get(TargetOpcode::COPY), VRBase [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64InstrInfo.cpp | 753 // Replace the TLS_base_addr instruction I with a copy from 762 // Insert a Copy from TLSBaseAddrReg to x0, which is where the rest of the 764 MachineInstr *Copy = BuildMI(*I->getParent(), I, I->getDebugLoc(), 765 TII->get(TargetOpcode::COPY), 772 return Copy; 776 // inserting a copy instruction after I. Returns the new instruction. 787 // Insert a copy from X0 to TLSBaseAddrReg for later. 789 MachineInstr *Copy = BuildMI(*I->getParent(), Next, I->getDebugLoc(), 790 TII->get(TargetOpcode::COPY), 794 return Copy; [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
R600ISelLowering.cpp | 101 BuildMI(*BB, I, BB->findDebugLoc(I), TII->get(AMDGPU::COPY))
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/external/llvm/lib/Target/ARM/ |
A15SDOptimizer.cpp | 271 // a subreg copy of a DPR, just use that DPR. 274 // Is it a subreg copy of ssub_0? 277 DEBUG(dbgs() << "Found a subreg copy: " << *SPRMI); 285 DEBUG(dbgs() << "Subreg copy is compatible - returning "); 337 // The only way we can do a partial register update is through a COPY, 365 // Look through full copies and PHIs to get the set of non-copy MachineInstrs 401 DEBUG(dbgs() << "Found partial copy" << *MI <<"\n"); 459 TII->get(TargetOpcode::COPY), Out) 586 // D/Q registers. These can only be caused by COPY, INSERT_SUBREG and 590 // COPY and PHI nodes to find it [all...] |
/external/qemu/android/ |
hw-events.h | 186 KEY_CODE(COPY ,133) \
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/external/chromium_org/chrome/browser/resources/file_manager/background/js/ |
progress_center.js | 357 case ProgressItemType.COPY:
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/external/qemu/distrib/zlib-1.2.3/ |
inflate.c | 20 * - Unroll direct copy to three copies per loop in inffast.c 37 * - Make MATCH copy in inflate() much faster for when inflate_fast() not used 46 * - Unroll last copy for window match in inflate_fast() 328 unsigned copy, dist; local 347 /* copy state->wsize or less output bytes into the circular window */ 348 copy = out - strm->avail_out; 349 if (copy >= state->wsize) { 356 if (dist > copy) dist = copy; 357 zmemcpy(state->window + state->write, strm->next_out - copy, dist) 565 unsigned copy; \/* number of stored or match bytes to copy *\/ local [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCInstrInfo.cpp | 512 // of a register class that can be r0, then copy it first (the 513 // register allocator should eliminate the copy). 521 BuildMI(MBB, MI, dl, get(TargetOpcode::COPY), FirstReg) 548 llvm_unreachable("Impossible reg-to-reg copy"); [all...] |
/external/chromium_org/chrome/browser/resources/file_manager/common/js/ |
util.js | 198 // Copy the params array, since we're going to destroy it. 247 // Copy the params array, since we're going to destroy it. 450 // to create it during the copy. However, if the resolve fails with 1050 COPY: 'COPY', [all...] |
/sdk/eclipse/plugins/com.android.ide.eclipse.gldebugger/src/com/android/ide/eclipse/gltrace/editors/ |
GLFunctionTraceViewer.java | 6 * You may obtain a copy of the License at 223 actionBars.setGlobalActionHandler(ActionFactory.COPY.getId(), 224 new Action("Copy") { [all...] |
/external/llvm/lib/Target/Hexagon/ |
HexagonHardwareLoops.cpp | [all...] |
/sdk/eclipse/plugins/com.android.ide.eclipse.adt/src/com/android/ide/eclipse/adt/internal/editors/layout/gle2/ |
OutlinePage.java | 6 * You may obtain a copy of the License at [all...] |