| /external/llvm/include/llvm/CodeGen/ |
| ISDOpcodes.h | 62 GlobalAddress, GlobalTLSAddress, FrameIndex,
[all...] |
| SelectionDAGNodes.h | [all...] |
| /external/llvm/lib/CodeGen/ |
| TargetInstrInfo.cpp | 245 int &FrameIndex) const {
253 FrameIndex = Value->getFrameIndex();
263 int &FrameIndex) const {
271 FrameIndex = Value->getFrameIndex();
|
| RegAllocFast.cpp | 623 int FrameIndex = getStackSpaceFor(VirtReg, RC);
626 TII->loadRegFromStackSlot(*MBB, MI, LRI->PhysReg, FrameIndex, RC, TRI);
[all...] |
| /external/llvm/lib/Target/Hexagon/ |
| HexagonRegisterInfo.cpp | 127 int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
133 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
|
| HexagonInstrInfo.cpp | 67 /// the destination along with the FrameIndex of the loaded stack slot. If
71 int &FrameIndex) const {
83 FrameIndex = MI->getOperand(2).getIndex();
94 /// the source reg along with the FrameIndex of the loaded stack slot. If
98 int &FrameIndex) const {
107 FrameIndex = MI->getOperand(0).getIndex();
[all...] |
| HexagonISelLowering.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| Thumb1RegisterInfo.cpp | 386 // Replace the FrameIndex with sp / fp
456 // Replace the FrameIndex with the frame register (e.g., sp).
499 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
572 int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
573 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex) +
576 if (AFI->isGPRCalleeSavedArea1Frame(FrameIndex))
578 else if (AFI->isGPRCalleeSavedArea2Frame(FrameIndex))
597 if (RS && FrameReg == ARM::SP && RS->isScavengingFrameIndex(FrameIndex)){
|
| ARMBaseRegisterInfo.cpp | 482 assert(i < MI->getNumOperands() &&"Instr doesn't have FrameIndex operand!");
604 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
625 assert(i < MI->getNumOperands() &&"Instr doesn't have FrameIndex operand!");
699 int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
702 int Offset = TFI->ResolveFrameIndexReference(MF, FrameIndex, FrameReg, SPAdj);
709 if (RS && FrameReg == ARM::SP && RS->isScavengingFrameIndex(FrameIndex)){
|
| ARMBaseInstrInfo.cpp | [all...] |
| ARMISelDAGToDAG.cpp | 535 if (N.getOpcode() == ISD::FrameIndex) {
561 if (Base.getOpcode() == ISD::FrameIndex) {
708 if (N.getOpcode() == ISD::FrameIndex) {
730 if (Base.getOpcode() == ISD::FrameIndex) {
[all...] |
| /external/llvm/lib/Target/X86/ |
| X86RegisterInfo.cpp | 468 int FrameIndex = MI.getOperand(FIOperandNum).getIndex();
474 BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister());
476 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr);
483 // FrameIndex with base register with EBP. Add an offset to the offset.
491 FIOffset = MFI->getObjectOffset(FrameIndex) - TFI->getOffsetOfLocalArea();
493 FIOffset = TFI->getFrameIndexOffset(MF, FrameIndex);
|
| X86InstrInfo.cpp | [all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsSEInstrInfo.cpp | 44 /// the destination along with the FrameIndex of the loaded stack slot. If
48 isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const
59 FrameIndex = MI->getOperand(1).getIndex();
69 /// the source reg along with the FrameIndex of the loaded stack slot. If
73 isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const
84 FrameIndex = MI->getOperand(1).getIndex();
|
| Mips16InstrInfo.cpp | 48 /// the destination along with the FrameIndex of the loaded stack slot. If
52 isLoadFromStackSlot(const MachineInstr *MI, int &FrameIndex) const
59 /// the source reg along with the FrameIndex of the loaded stack slot. If
63 isStoreToStackSlot(const MachineInstr *MI, int &FrameIndex) const
|
| /external/llvm/lib/Target/Sparc/ |
| SparcISelDAGToDAG.cpp | 118 if (Addr.getOpcode() == ISD::FrameIndex) return false;
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZISelDAGToDAG.cpp | 441 if (Base->getOpcode() == ISD::FrameIndex)
538 else if (Base.getOpcode() == ISD::FrameIndex) {
539 // Lower a FrameIndex to a TargetFrameIndex.
540 int64_t FrameIndex = cast<FrameIndexSDNode>(Base)->getIndex();
541 Base = CurDAG->getTargetFrameIndex(FrameIndex, VT);
[all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64FrameLowering.cpp | 321 int FrameIndex,
329 int64_t TopOfFrameOffset = MFI->getObjectOffset(FrameIndex);
|
| AArch64ISelDAGToDAG.cpp | 475 case ISD::FrameIndex: {
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.cpp | 101 int &FrameIndex) const {
116 FrameIndex = MI->getOperand(2).getIndex();
125 int &FrameIndex) const {
140 FrameIndex = MI->getOperand(2).getIndex();
[all...] |
| PPCISelDAGToDAG.cpp | [all...] |
| /external/llvm/lib/Target/R600/ |
| AMDGPUISelDAGToDAG.cpp | 112 if (Addr.getOpcode() == ISD::FrameIndex) {
145 if (Addr.getOpcode() == ISD::FrameIndex) {
|
| R600ISelLowering.cpp | 90 setOperationAction(ISD::FrameIndex, MVT::i32, Custom);
492 case ISD::FrameIndex: return LowerFrameIndex(Op, DAG);
804 unsigned FrameIndex = FIN->getIndex();
805 unsigned Offset = TFL->getFrameIndexOffset(MF, FrameIndex);
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 89 case ISD::FrameIndex: return "FrameIndex";
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430ISelLowering.cpp | [all...] |
