| /external/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMMCTargetDesc.cpp | 235 virtual bool isUnconditionalBranch(const MCInst &Inst) const {
242 virtual bool isConditionalBranch(const MCInst &Inst) const {
249 bool evaluateBranch(const MCInst &Inst, uint64_t Addr,
|
| ARMAsmBackend.cpp | 122 bool mayNeedRelaxation(const MCInst &Inst) const;
129 void relaxInstruction(const MCInst &Inst, MCInst &Res) const;
161 bool ARMAsmBackend::mayNeedRelaxation(const MCInst &Inst) const {
203 void ARMAsmBackend::relaxInstruction(const MCInst &Inst, MCInst &Res) const {
|
| /external/llvm/lib/Target/X86/AsmParser/ |
| X86AsmParser.cpp | 1 //===-- X86AsmParser.cpp - Parse X86 assembly to MCInst instructions ------===//
19 #include "llvm/MC/MCInst.h"
520 bool processInstruction(MCInst &Inst,
854 void addExpr(MCInst &Inst, const MCExpr *Expr) const {
862 void addRegOperands(MCInst &Inst, unsigned N) const {
867 void addImmOperands(MCInst &Inst, unsigned N) const {
872 void addMem8Operands(MCInst &Inst, unsigned N) const {
875 void addMem16Operands(MCInst &Inst, unsigned N) const {
878 void addMem32Operands(MCInst &Inst, unsigned N) const {
881 void addMem64Operands(MCInst &Inst, unsigned N) const
[all...] |
| /external/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AsmBackend.cpp | 194 bool mayNeedRelaxation(const MCInst&) const {
198 void relaxInstruction(const MCInst&, llvm::MCInst&) const {
|
| /external/llvm/lib/MC/ |
| MCNullStreamer.cpp | 12 #include "llvm/MC/MCInst.h"
99 virtual void EmitInstruction(const MCInst &Inst) {}
|
| MCObjectStreamer.cpp | 192 void MCObjectStreamer::EmitInstruction(const MCInst &Inst) {
219 MCInst Relaxed;
231 void MCObjectStreamer::EmitInstToFragment(const MCInst &Inst) {
|
| MCAtom.cpp | 74 void MCTextAtom::addInst(const MCInst &I, uint64_t Size) {
|
| MCExternalSymbolizer.cpp | 13 #include "llvm/MC/MCInst.h"
20 // Value in the MCInst. The immediate Value has had any PC adjustment made by
26 // and that is added as an operand to the MCInst. If getOpInfo() returns zero
29 // created. This function returns true if it adds an operand to the MCInst and
31 bool MCExternalSymbolizer::tryAddingSymbolicOperand(MCInst &MI,
|
| /external/llvm/lib/Target/ARM/ |
| ARMMCInstLower.cpp | 1 //===-- ARMMCInstLower.cpp - Convert ARM MachineInstr to an MCInst --------===//
11 // MCInst records.
21 #include "llvm/MC/MCInst.h"
114 void llvm::LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
|
| Thumb1InstrInfo.cpp | 20 #include "llvm/MC/MCInst.h"
29 void Thumb1InstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
|
| ARMInstrInfo.cpp | 28 #include "llvm/MC/MCInst.h"
36 void ARMInstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430AsmPrinter.cpp | 31 #include "llvm/MC/MCInst.h"
159 MCInst TmpInst;
|
| MSP430MCInstLower.cpp | 1 //===-- MSP430MCInstLower.cpp - Convert MSP430 MachineInstr to an MCInst --===//
11 // MCInst records.
23 #include "llvm/MC/MCInst.h"
109 void MSP430MCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZAsmPrinter.cpp | 30 MCInst LoweredMI;
|
| SystemZMCInstLower.cpp | 1 //===-- SystemZMCInstLower.cpp - Lower MachineInstr to MCInst -------------===//
95 void SystemZMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
|
| /external/llvm/lib/Target/X86/MCTargetDesc/ |
| X86MCCodeEmitter.cpp | 21 #include "llvm/MC/MCInst.h"
68 unsigned char getVEXRegisterEncoding(const MCInst &MI,
80 unsigned char getWriteMaskRegisterEncoding(const MCInst &MI,
126 void EmitMemModRMByte(const MCInst &MI, unsigned Op,
131 void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
135 const MCInst &MI, const MCInstrDesc &Desc,
139 int MemOperand, const MCInst &MI,
143 const MCInst &MI, const MCInstrDesc &Desc,
220 static bool Is32BitMemOperand(const MCInst &MI, unsigned Op) {
235 static bool Is64BitMemOperand(const MCInst &MI, unsigned Op)
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreMCInstLower.cpp | 1 //===-- XCoreMCInstLower.cpp - Convert XCore MachineInstr to MCInst -------===//
12 /// corresponding MCInst records.
22 #include "llvm/MC/MCInst.h"
107 void XCoreMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
|
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/gallivm/ |
| lp_bld_debug.cpp | 51 #include <llvm/MC/MCInst.h>
295 MCInst Inst;
|
| /external/llvm/include/llvm/MC/ |
| MCInstrDesc.h | 18 #include "llvm/MC/MCInst.h"
267 bool mayAffectControlFlow(const MCInst &MI, const MCRegisterInfo &RI) const {
538 bool hasDefOfPhysReg(const MCInst &MI, unsigned Reg,
|
| MCAssembler.h | 19 #include "llvm/MC/MCInst.h"
289 /// A relaxable fragment holds on to its MCInst, since it may need to be
296 MCInst Inst;
305 MCRelaxableFragment(const MCInst &_Inst, MCSectionData *SD = 0)
312 const MCInst &getInst() const { return Inst; }
313 void setInst(const MCInst& Value) { Inst = Value; }
[all...] |
| /external/llvm/lib/Target/SystemZ/AsmParser/ |
| SystemZAsmParser.cpp | 14 #include "llvm/MC/MCInst.h"
110 void addExpr(MCInst &Inst, const MCExpr *Expr) const {
229 void addRegOperands(MCInst &Inst, unsigned N) const {
233 void addAccessRegOperands(MCInst &Inst, unsigned N) const {
238 void addImmOperands(MCInst &Inst, unsigned N) const {
242 void addBDAddrOperands(MCInst &Inst, unsigned N) const {
248 void addBDXAddrOperands(MCInst &Inst, unsigned N) const {
255 void addBDLAddrOperands(MCInst &Inst, unsigned N) const {
697 MCInst Inst;
|
| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| lp_bld_debug.cpp | 51 #include <llvm/MC/MCInst.h>
295 MCInst Inst;
|
| /frameworks/compile/libbcc/lib/Support/ |
| Disassembler.cpp | 28 #include <llvm/MC/MCInst.h>
135 llvm::MCInst inst;
|
| /external/llvm/lib/Target/AArch64/ |
| AArch64MCInstLower.cpp | 1 //===-- AArch64MCInstLower.cpp - Convert AArch64 MachineInstr to an MCInst -==//
11 // MCInst records.
25 #include "llvm/MC/MCInst.h"
146 MCInst &OutMI,
|
| /external/llvm/lib/Target/Mips/ |
| MipsMCInstLower.cpp | 1 //===-- MipsMCInstLower.cpp - Convert Mips MachineInstr to MCInst ---------===//
11 // MCInst records.
23 #include "llvm/MC/MCInst.h"
118 static void CreateMCInst(MCInst& Inst, unsigned Opc, const MCOperand &Opnd0,
155 void MipsMCInstLower::Lower(const MachineInstr *MI, MCInst &OutMI) const {
|
