| /external/llvm/lib/Target/MSP430/InstPrinter/ |
| MSP430InstPrinter.cpp | 1 //===-- MSP430InstPrinter.cpp - Convert MSP430 MCInst to assembly syntax --===//
10 // This class prints an MSP430 MCInst to a .s file.
19 #include "llvm/MC/MCInst.h"
28 void MSP430InstPrinter::printInst(const MCInst *MI, raw_ostream &O,
34 void MSP430InstPrinter::printPCRelImmOperand(const MCInst *MI, unsigned OpNo,
45 void MSP430InstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
59 void MSP430InstPrinter::printSrcMemOperand(const MCInst *MI, unsigned OpNo,
88 void MSP430InstPrinter::printCCOperand(const MCInst *MI, unsigned OpNo,
|
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64Disassembler.cpp | 22 #include "llvm/MC/MCInst.h"
52 DecodeStatus getInstruction(MCInst &instr,
65 static DecodeStatus DecodeGPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
68 DecodeGPR64xspRegisterClass(llvm::MCInst &Inst, unsigned RegNo,
71 static DecodeStatus DecodeGPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
74 DecodeGPR32wspRegisterClass(llvm::MCInst &Inst, unsigned RegNo,
77 static DecodeStatus DecodeFPR8RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
79 static DecodeStatus DecodeFPR16RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
81 static DecodeStatus DecodeFPR32RegisterClass(llvm::MCInst &Inst, unsigned RegNo,
83 static DecodeStatus DecodeFPR64RegisterClass(llvm::MCInst &Inst, unsigned RegNo
[all...] |
| /external/llvm/lib/Target/XCore/Disassembler/ |
| XCoreDisassembler.cpp | 19 #include "llvm/MC/MCInst.h"
38 virtual DecodeStatus getInstruction(MCInst &instr,
87 static DecodeStatus DecodeGRRegsRegisterClass(MCInst &Inst,
92 static DecodeStatus DecodeRRegsRegisterClass(MCInst &Inst,
97 static DecodeStatus DecodeBitpOperand(MCInst &Inst, unsigned Val,
100 static DecodeStatus DecodeNegImmOperand(MCInst &Inst, unsigned Val,
103 static DecodeStatus Decode2RInstruction(MCInst &Inst,
108 static DecodeStatus Decode2RImmInstruction(MCInst &Inst,
113 static DecodeStatus DecodeR2RInstruction(MCInst &Inst,
118 static DecodeStatus Decode2RSrcDstInstruction(MCInst &Inst
[all...] |
| /external/llvm/include/llvm/MC/ |
| MCInst.h | 1 //===-- llvm/MC/MCInst.h - MCInst class -------------------------*- C++ -*-===//
10 // This file contains the declaration of the MCInst and MCOperand classes, which
29 class MCInst;
31 /// MCOperand - Instances of this class represent operands of the MCInst class.
49 const MCInst *InstVal;
102 const MCInst *getInst() const {
106 void setInst(const MCInst *Val) {
135 static MCOperand CreateInst(const MCInst *Val) {
148 /// MCInst - Instances of this class represent a single low-level machin
[all...] |
| MCObjectSymbolizer.h | 26 class MCInst;
58 bool tryAddingSymbolicOperand(MCInst &MI, raw_ostream &cStream,
|
| MCDisassembler.h | 20 class MCInst;
37 /// is a "soft fail" failure mode that indicates the MCInst& is
68 /// @param instr - An MCInst to populate with the contents of the
82 virtual DecodeStatus getInstruction(MCInst& instr,
109 bool tryAddingSymbolicOperand(MCInst &Inst,
|
| MCExternalSymbolizer.h | 48 bool tryAddingSymbolicOperand(MCInst &MI, raw_ostream &CommentStream,
|
| /external/llvm/lib/Target/MSP430/ |
| MSP430MCInstLower.h | 1 //===-- MSP430MCInstLower.h - Lower MachineInstr to MCInst ------*- C++ -*-===//
18 class MCInst;
26 /// into an MCInst.
34 void Lower(const MachineInstr *MI, MCInst &OutMI) const;
|
| /external/llvm/lib/Target/PowerPC/ |
| PPC.h | 31 class MCInst;
42 void LowerPPCMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
| AMDGPUMCInstLower.cpp | 1 //===- AMDGPUMCInstLower.cpp - Lower AMDGPU MachineInstr to an MCInst -----===//
11 // MCInst.
22 #include "llvm/MC/MCInst.h"
30 void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
71 MCInst MCBundleInst;
78 MCInst TmpInst;
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/MCTargetDesc/ |
| AMDGPUAsmBackend.cpp | 55 virtual void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
58 virtual bool mayNeedRelaxation(const MCInst &Inst) const { return false; }
|
| R600MCCodeEmitter.cpp | 24 #include "llvm/MC/MCInst.h"
53 virtual void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
57 virtual uint64_t getMachineOpValue(const MCInst &MI, const MCOperand &MO,
61 void EmitALUInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups,
63 void EmitSrc(const MCInst &MI, unsigned OpIdx, raw_ostream &OS) const;
64 void EmitDst(const MCInst &MI, raw_ostream &OS) const;
65 void EmitALU(const MCInst &MI, unsigned numSrc,
68 void EmitTexInstr(const MCInst &MI, SmallVectorImpl<MCFixup> &Fixups,
70 void EmitFCInstr(const MCInst &MI, raw_ostream &OS) const;
87 bool isFlagSet(const MCInst &MI, unsigned Operand, unsigned Flag) const
[all...] |
| /external/llvm/lib/MC/ |
| MCInst.cpp | 1 //===- lib/MC/MCInst.cpp - MCInst implementation --------------------------===//
10 #include "llvm/MC/MCInst.h"
42 void MCInst::print(raw_ostream &OS, const MCAsmInfo *MAI) const {
43 OS << "<MCInst " << getOpcode();
51 void MCInst::dump_pretty(raw_ostream &OS, const MCAsmInfo *MAI,
54 OS << "<MCInst #" << getOpcode();
68 void MCInst::dump() const {
|
| /external/llvm/lib/Target/R600/ |
| AMDGPUMCInstLower.cpp | 1 //===- AMDGPUMCInstLower.cpp - Lower AMDGPU MachineInstr to an MCInst -----===//
11 /// \brief Code to lower AMDGPU MachineInstrs to their corresponding MCInst.
23 #include "llvm/MC/MCInst.h"
33 void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
72 MCInst MCBundleInst;
79 MCInst TmpInst;
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUMCInstLower.cpp | 1 //===- AMDGPUMCInstLower.cpp - Lower AMDGPU MachineInstr to an MCInst -----===//
11 // MCInst.
22 #include "llvm/MC/MCInst.h"
30 void AMDGPUMCInstLower::lower(const MachineInstr *MI, MCInst &OutMI) const {
71 MCInst MCBundleInst;
78 MCInst TmpInst;
|
| /external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
| AMDGPUAsmBackend.cpp | 55 virtual void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
58 virtual bool mayNeedRelaxation(const MCInst &Inst) const { return false; }
|
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 1 //===-- ARMInstPrinter.cpp - Convert ARM MCInst to assembly syntax --------===//
10 // This class prints an ARM MCInst to a .s file.
20 #include "llvm/MC/MCInst.h"
75 void ARMInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
257 MCInst NewMI;
279 void ARMInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
306 void ARMInstPrinter::printThumbLdrLabelOperand(const MCInst *MI, unsigned OpNum,
339 void ARMInstPrinter::printSORegRegOperand(const MCInst *MI, unsigned OpNum,
358 void ARMInstPrinter::printSORegImmOperand(const MCInst *MI, unsigned OpNum,
375 void ARMInstPrinter::printAM2PreOrOffsetIndexOp(const MCInst *MI, unsigned Op
[all...] |
| /external/llvm/lib/Target/PowerPC/InstPrinter/ |
| PPCInstPrinter.cpp | 1 //===-- PPCInstPrinter.cpp - Convert PPC MCInst to assembly syntax --------===//
10 // This class prints an PPC MCInst to a .s file.
19 #include "llvm/MC/MCInst.h"
30 void PPCInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
86 void PPCInstPrinter::printPredicateOperand(const MCInst *MI, unsigned OpNo,
177 void PPCInstPrinter::printS5ImmOperand(const MCInst *MI, unsigned OpNo,
184 void PPCInstPrinter::printU5ImmOperand(const MCInst *MI, unsigned OpNo,
191 void PPCInstPrinter::printU6ImmOperand(const MCInst *MI, unsigned OpNo,
198 void PPCInstPrinter::printS16ImmOperand(const MCInst *MI, unsigned OpNo,
206 void PPCInstPrinter::printU16ImmOperand(const MCInst *MI, unsigned OpNo
[all...] |
| /external/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsMCCodeEmitter.cpp | 23 #include "llvm/MC/MCInst.h"
62 void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
67 uint64_t getBinaryCodeForInstr(const MCInst &MI,
73 unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo,
79 unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo,
84 unsigned getMachineOpValue(const MCInst &MI,const MCOperand &MO,
87 unsigned getMemEncoding(const MCInst &MI, unsigned OpNo,
89 unsigned getSizeExtEncoding(const MCInst &MI, unsigned OpNo,
91 unsigned getSizeInsEncoding(const MCInst &MI, unsigned OpNo,
119 static void LowerLargeShift(MCInst& Inst)
[all...] |
| /external/llvm/lib/Target/Mips/InstPrinter/ |
| MipsInstPrinter.cpp | 1 //===-- MipsInstPrinter.cpp - Convert Mips MCInst to assembly syntax ------===//
10 // This class prints an Mips MCInst to a .s file.
19 #include "llvm/MC/MCInst.h"
30 static bool isReg(const MCInst &MI, unsigned OpNo) {
77 void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
161 void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
178 void MipsInstPrinter::printUnsignedImm(const MCInst *MI, int opNum,
188 printMemOperand(const MCInst *MI, int opNum, raw_ostream &O) {
199 printMemOperandEA(const MCInst *MI, int opNum, raw_ostream &O) {
209 printFCCOperand(const MCInst *MI, int opNum, raw_ostream &O)
[all...] |
| /external/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCAsmBackend.cpp | 15 #include "llvm/MC/MCInst.h"
62 virtual bool mayNeedRelaxation(const MCInst &Inst) const LLVM_OVERRIDE;
68 virtual void relaxInstruction(const MCInst &Inst,
69 MCInst &Res) const LLVM_OVERRIDE;
117 bool SystemZMCAsmBackend::mayNeedRelaxation(const MCInst &Inst) const {
131 void SystemZMCAsmBackend::relaxInstruction(const MCInst &Inst,
132 MCInst &Res) const {
|
| /external/llvm/lib/Target/X86/InstPrinter/ |
| X86IntelInstPrinter.cpp | 10 // This file includes code for rendering MCInst instances as Intel-style
21 #include "llvm/MC/MCInst.h"
34 void X86IntelInstPrinter::printInst(const MCInst *MI, raw_ostream &OS,
52 void X86IntelInstPrinter::printSSECC(const MCInst *MI, unsigned Op,
76 void X86IntelInstPrinter::printAVXCC(const MCInst *MI, unsigned Op,
118 void X86IntelInstPrinter::printPCRelImm(const MCInst *MI, unsigned OpNo,
139 void X86IntelInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
152 void X86IntelInstPrinter::printMemReference(const MCInst *MI, unsigned Op,
|
| /external/llvm/lib/Target/R600/MCTargetDesc/ |
| AMDGPUAsmBackend.cpp | 55 virtual void relaxInstruction(const MCInst &Inst, MCInst &Res) const {
58 virtual bool mayNeedRelaxation(const MCInst &Inst) const { return false; }
|
| /external/llvm/lib/Target/ARM/ |
| Thumb1InstrInfo.h | 30 void getNoopForMachoTarget(MCInst &NopInst) const;
|
| /external/llvm/lib/Target/ARM/Disassembler/ |
| ARMDisassembler.cpp | 19 #include "llvm/MC/MCInst.h"
101 DecodeStatus getInstruction(MCInst &instr,
122 DecodeStatus getInstruction(MCInst &instr,
131 DecodeStatus AddThumbPredicate(MCInst&) const;
132 void UpdateThumbVFPPredicate(MCInst&) const;
154 static DecodeStatus DecodeGPRRegisterClass(MCInst &Inst, unsigned RegNo,
156 static DecodeStatus DecodeGPRnopcRegisterClass(MCInst &Inst,
159 static DecodeStatus DecodeGPRwithAPSRRegisterClass(MCInst &Inst,
162 static DecodeStatus DecodetGPRRegisterClass(MCInst &Inst, unsigned RegNo,
164 static DecodeStatus DecodetcGPRRegisterClass(MCInst &Inst, unsigned RegNo
[all...] |
