| /external/llvm/lib/Target/XCore/ |
| XCoreAsmPrinter.cpp | 211 O << XCoreInstPrinter::getRegisterName(MO.getReg());
266 << XCoreInstPrinter::getRegisterName(MI->getOperand(0).getReg()) << ", "
267 << XCoreInstPrinter::getRegisterName(MI->getOperand(1).getReg());
275 << XCoreInstPrinter::getRegisterName(MI->getOperand(1).getReg()) << '\n';
|
| /external/mesa3d/src/gallium/drivers/radeon/ |
| AMDGPUMCInstLower.cpp | 51 MCOp = MCOperand::CreateReg(MO.getReg());
|
| /external/llvm/lib/CodeGen/ |
| MachineSink.cpp | 128 unsigned SrcReg = MI->getOperand(1).getReg();
129 unsigned DstReg = MI->getOperand(0).getReg();
312 unsigned Reg = MO.getReg();
408 DI->getOperand(0).getReg() == MI->getOperand(0).getReg())
487 unsigned Reg = MO.getReg();
610 unsigned Reg = MO.getReg();
|
| MachineCSE.cpp | 121 unsigned Reg = MO.getReg();
131 unsigned SrcReg = DefMI->getOperand(1).getReg();
169 if (!MO.isReg() || !MO.getReg())
171 if (!TRI->regsOverlap(MO.getReg(), Reg))
203 unsigned Reg = MO.getReg();
222 unsigned Reg = MO.getReg();
298 unsigned MOReg = MO.getReg();
384 TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
521 unsigned OldReg = MO.getReg();
522 unsigned NewReg = CSMI->getOperand(i).getReg();
[all...] |
| LiveDebugVariables.cpp | 181 if (LocMO.getReg() == 0)
186 locations[i].getReg() == LocMO.getReg() &&
415 TargetRegisterInfo::isVirtualRegister(locations[i].getReg()))
416 LDV->mapVirtReg(locations[i].getReg(), this);
575 unsigned DstReg = MI->getOperand(0).getReg();
653 if (TargetRegisterInfo::isVirtualRegister(Loc.getReg())) {
656 if (LIS.hasInterval(Loc.getReg())) {
657 LI = &LIS.getInterval(Loc.getReg());
668 unsigned Unit = *MCRegUnitIterator(Loc.getReg(), &TRI)
[all...] |
| MachineInstr.cpp | 50 if (getReg() == Reg) return; // No change.
177 return getReg() == Other.getReg() && isDef() == Other.isDef() &&
217 return hash_combine(MO.getType(), MO.getReg(), MO.getSubReg(), MO.isDef());
267 OS << PrintReg(getReg(), TRI, getSubReg());
808 if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()) ||
809 TargetRegisterInfo::isPhysicalRegister(OMO.getReg()))
810 if (MO.getReg() != OMO.getReg())
[all...] |
| InlineSpiller.cpp | 217 if (MI->getOperand(0).getReg() == Reg)
218 return MI->getOperand(1).getReg();
219 if (MI->getOperand(1).getReg() == Reg)
220 return MI->getOperand(0).getReg();
226 /// Edit->getReg().
228 unsigned Reg = Edit->getReg();
271 unsigned Reg = Edit->getReg();
636 if (Edit->getReg() == Original)
828 LiveInterval &SnipLI = LIS.getInterval(MI->getOperand(1).getReg());
846 if (MO.isReg() && MO.isUse() && MO.getReg() == VirtReg.reg
[all...] |
| LiveRangeEdit.cpp | 84 if (!MO.isReg() || !MO.getReg() || !MO.readsReg())
88 if (TargetRegisterInfo::isPhysicalRegister(MO.getReg())) {
89 if (MRI.isConstantPhysReg(MO.getReg(), *OrigMI->getParent()->getParent()))
94 LiveInterval &li = LIS.getInterval(MO.getReg());
251 unsigned Reg = MOI->getReg();
302 if (MO.isReg() && TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
|
| CriticalAntiDepBreaker.cpp | 172 unsigned Reg = MO.getReg();
235 unsigned Reg = MO.getReg();
266 unsigned Reg = MO.getReg();
336 CheckOper.getReg() != NewReg)
522 AntiDepReg = Edge->getReg();
543 (P->getKind() != SDep::Anti || P->getReg() != AntiDepReg) :
544 (P->getKind() == SDep::Data && P->getReg() == AntiDepReg)) {
579 unsigned Reg = MO.getReg();
|
| ProcessImplicitDefs.cpp | 78 unsigned Reg = MI->getOperand(0).getReg();
108 unsigned UserReg = MO->getReg();
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZElimCompare.cpp | 114 MI->getOperand(0).getReg() == Reg &&
131 if (MI->getOperand(1).getReg() == Reg &&
145 if (unsigned MOReg = MO.getReg()) {
192 unsigned SrcReg = Compare->getOperand(0).getReg();
329 unsigned SrcReg = Compare->getOperand(0).getReg();
382 unsigned SrcReg = Compare->getOperand(0).getReg();
384 Compare->getOperand(1).getReg() : 0);
|
| SystemZFrameLowering.cpp | 142 unsigned Reg = CSI[I].getReg();
188 unsigned Reg = CSI[I].getReg();
201 unsigned Reg = CSI[I].getReg();
228 unsigned Reg = CSI[I].getReg();
258 unsigned Reg = CSI[I].getReg();
341 unsigned Reg = I->getReg();
390 unsigned Reg = I->getReg();
402 unsigned Reg = MRI->getDwarfRegNum(I->getReg(), true);
442 emitIncrement(MBB, MBBI, DL, MBBI->getOperand(AddrOpNo).getReg(),
|
| /external/llvm/lib/Target/Mips/ |
| MipsAsmPrinter.cpp | 153 unsigned Reg = CSI[i].getReg();
171 unsigned Reg = CSI[i].getReg();
390 unsigned Reg = MO.getReg();
416 unsigned Reg = MO.getReg();
443 O << Offset << "($" << MipsInstPrinter::getRegisterName(MO.getReg()) << ")";
476 << StringRef(MipsInstPrinter::getRegisterName(MO.getReg())).lower();
|
| MipsSEInstrInfo.cpp | 60 return MI->getOperand(0).getReg();
85 return MI->getOperand(0).getReg();
408 unsigned DstReg = Dst.getReg(), SrcReg = Src.getReg(), TmpReg = DstReg;
428 unsigned DstReg = I->getOperand(0).getReg();
429 unsigned SrcReg = I->getOperand(1).getReg();
443 unsigned DstReg = I->getOperand(0).getReg();
444 unsigned LoReg = I->getOperand(1).getReg(), HiReg = I->getOperand(2).getReg();
489 unsigned LoReg = TRI.getSubReg(ValReg.getReg(), Mips::sub_fpeven)
[all...] |
| /external/llvm/lib/Target/R600/ |
| R600MachineScheduler.cpp | 181 if (MO.isReg() && MO.getReg() == AMDGPU::ALU_LITERAL_X)
204 return !TargetRegisterInfo::isVirtualRegister(MI->getOperand(1).getReg());
224 if (I->isReg() && I->getReg() == AMDGPU::AR_X) {
304 unsigned DestReg = MI->getOperand(0).getReg();
385 unsigned DestReg = MI->getOperand(DstIndex).getReg();
392 MO.getReg() == DestReg)
|
| /dalvik/dx/src/com/android/dx/ssa/ |
| NormalSsaInsn.java | 75 if (origSpec.getReg() != newSpec.getReg()) {
|
| SCCP.java | 160 int phiResultReg = insn.getResult().getReg();
173 int sourceReg = sources.get(i).getReg();
253 int regA = specA.getReg();
261 int regB = specB.getReg();
369 int regA = sources.get(0).getReg();
383 int regB = sources.get(1).getReg();
489 int resultReg = result.getReg();
502 int sourceReg = insn.getSources().get(0).getReg();
|
| SsaBasicBlock.java | 576 if (result.getReg() == source.getReg()) {
632 if (result.getReg() == source.getReg()) {
654 regsUsed.set(rs.getReg());
656 regsUsed.set(rs.getReg() + 1);
670 int reg = rs.getReg();
912 = firstNonPhiMoveInsn.getResult().getReg();
[all...] |
| /dalvik/dx/src/com/android/dx/ssa/back/ |
| RegisterAllocator.java | 169 int newReg = newRegSpec.getReg();
188 interference.add(newReg, sources.get(i).getReg());
|
| /external/dexmaker/src/dx/java/com/android/dx/ssa/ |
| NormalSsaInsn.java | 70 if (origSpec.getReg() != newSpec.getReg()) {
|
| SCCP.java | 161 int phiResultReg = insn.getResult().getReg();
174 int sourceReg = sources.get(i).getReg();
254 int regA = specA.getReg();
262 int regB = specB.getReg();
370 int regA = sources.get(0).getReg();
384 int regB = sources.get(1).getReg();
490 int resultReg = result.getReg();
503 int sourceReg = insn.getSources().get(0).getReg();
|
| SsaBasicBlock.java | 577 if (result.getReg() == source.getReg()) {
633 if (result.getReg() == source.getReg()) {
655 regsUsed.set(rs.getReg());
657 regsUsed.set(rs.getReg() + 1);
671 int reg = rs.getReg();
913 = firstNonPhiMoveInsn.getResult().getReg();
[all...] |
| /external/dexmaker/src/dx/java/com/android/dx/ssa/back/ |
| RegisterAllocator.java | 171 int newReg = newRegSpec.getReg();
190 interference.add(newReg, sources.get(i).getReg());
|
| /external/llvm/include/llvm/CodeGen/ |
| LiveVariables.h | 215 if (MO.isReg() && MO.isKill() && MO.getReg() == reg) {
251 if (MO.isReg() && MO.isDef() && MO.getReg() == reg) {
|
| /external/llvm/lib/Target/ARM/ |
| ARMLoadStoreOptimizer.cpp | 406 unsigned DefReg = MO->getReg();
458 unsigned PReg = PMO.getReg();
484 unsigned Reg = MO.getReg();
520 if (MO.isDef() && MO.getReg() == ARM::CPSR && !MO.isDead())
552 if (!(MI->getOperand(0).getReg() == Base &&
553 MI->getOperand(1).getReg() == Base &&
585 if (!(MI->getOperand(0).getReg() == Base &&
586 MI->getOperand(1).getReg() == Base &&
715 unsigned Base = MI->getOperand(0).getReg();
726 if (MI->getOperand(i).getReg() == Base
[all...] |
