| /external/llvm/lib/Target/R600/MCTargetDesc/ |
| R600MCCodeEmitter.cpp | 175 return MRI.getEncodingValue(MO.getReg());
177 return getHWReg(MO.getReg());
|
| /external/llvm/lib/Target/X86/ |
| X86FrameLowering.cpp | 125 unsigned Reg = MO.getReg();
213 PI->getOperand(0).getReg() == StackPtr) {
219 PI->getOperand(0).getReg() == StackPtr) {
242 NI->getOperand(0).getReg() == StackPtr) {
249 NI->getOperand(0).getReg() == StackPtr) {
277 PI->getOperand(0).getReg() == StackPtr){
283 PI->getOperand(0).getReg() == StackPtr) {
337 unsigned Reg = I->getReg();
527 unsigned Reg = MI.getOperand(0).getReg();
533 SavedRegs[SavedRegIdx++] = MI.getOperand(0).getReg();
[all...] |
| /dalvik/dx/src/com/android/dx/ssa/ |
| ConstCollector.java | 280 for (SsaInsn use : ssaMeth.getUseListForRegister(origReg.getReg())) {
381 if (registerSpec.getReg() == origReg.getReg()) {
390 for (SsaInsn use : useList[origReg.getReg()]) {
|
| /external/dexmaker/src/dx/java/com/android/dx/ssa/ |
| ConstCollector.java | 280 for (SsaInsn use : ssaMeth.getUseListForRegister(origReg.getReg())) {
381 if (registerSpec.getReg() == origReg.getReg()) {
390 for (SsaInsn use : useList[origReg.getReg()]) {
|
| /external/llvm/lib/CodeGen/ |
| MachineInstrBundle.cpp | 133 unsigned Reg = MO.getReg();
156 unsigned Reg = MO.getReg();
257 if (!MO.isReg() || MO.getReg() != Reg)
297 unsigned MOReg = MO.getReg();
|
| AggressiveAntiDepBreaker.cpp | 229 unsigned Reg = MO.getReg();
249 const unsigned Reg = MO.getReg();
264 unsigned Reg = P->getReg();
349 unsigned Reg = MO.getReg();
359 unsigned Reg = MO.getReg();
399 unsigned Reg = MO.getReg();
442 unsigned Reg = MO.getReg();
477 unsigned Reg = MO.getReg();
800 unsigned AntiDepReg = Edge->getReg();
841 (P->getKind() != SDep::Anti || P->getReg() != AntiDepReg)
[all...] |
| CalcSpillWeights.cpp | 66 if (mi->getOperand(0).getReg() == reg) {
68 hreg = mi->getOperand(1).getReg();
72 hreg = mi->getOperand(0).getReg();
|
| LiveVariables.cpp | 216 if (!MO.isReg() || !MO.isDef() || MO.getReg() == 0)
218 unsigned DefReg = MO.getReg();
405 bool NeedEC = MO->isEarlyClobber() && MO->getReg() != Reg;
570 if (!MO.isReg() || MO.getReg() == 0)
572 unsigned MOReg = MO.getReg();
689 unsigned Reg = MO.getReg();
711 .push_back(BBI->getOperand(i).getReg());
790 Defs.insert(BBI->getOperand(0).getReg());
795 getVarInfo(BBI->getOperand(i).getReg()).AliveBlocks.set(NumNew);
802 if (I->isReg() && TargetRegisterInfo::isVirtualRegister(I->getReg())) {
[all...] |
| PeepholeOptimizer.cpp | 324 unsigned Reg = MO.getReg();
351 unsigned Reg = MO.getReg();
425 unsigned Reg = MI->getOperand(0).getReg();
446 unsigned Reg = MI->getOperand(0).getReg();
466 unsigned Reg = MO.getReg();
|
| PHIElimination.cpp | 155 unsigned DefReg = DefMI->getOperand(0).getReg();
213 if (!isImplicitlyDefined(MPhi->getOperand(i).getReg(), MRI))
231 unsigned DestReg = MPhi->getOperand(0).getReg();
352 MPhi->getOperand(i).getReg())];
358 unsigned SrcReg = MPhi->getOperand(i*2+1).getReg();
541 BBI->getOperand(i).getReg())];
557 unsigned Reg = BBI->getOperand(i).getReg();
|
| /external/llvm/lib/Target/ARM/ |
| ARMHazardRecognizer.cpp | 30 return MI->readsRegister(DefMI->getOperand(0).getReg(), &TRI);
|
| Thumb1FrameLowering.cpp | 120 unsigned Reg = CSI[i].getReg();
226 isCalleeSavedRegister(MI->getOperand(0).getReg(), CSRegs))
232 if (!isCalleeSavedRegister(MI->getOperand(i).getReg(), CSRegs))
347 unsigned Reg = CSI[i-1].getReg();
388 unsigned Reg = CSI[i-1].getReg();
|
| /external/llvm/lib/Target/Hexagon/ |
| HexagonFrameLowering.cpp | 242 unsigned Reg = CSI[i].getReg();
252 unsigned SuperRegNext = uniqueSuperReg(CSI[i+1].getReg(), TRI);
297 unsigned Reg = CSI[i].getReg();
306 unsigned SuperRegNext = uniqueSuperReg(CSI[i+1].getReg(), TRI);
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCAsmPrinter.cpp | 145 const char *RegName = PPCInstPrinter::getRegisterName(MO.getReg());
510 .addReg(MI->getOperand(0).getReg())
542 .addReg(MI->getOperand(0).getReg())
558 .addReg(MI->getOperand(0).getReg())
559 .addReg(MI->getOperand(1).getReg())
594 .addReg(MI->getOperand(0).getReg())
610 .addReg(MI->getOperand(0).getReg())
611 .addReg(MI->getOperand(1).getReg())
646 .addReg(MI->getOperand(0).getReg())
662 .addReg(MI->getOperand(0).getReg())
[all...] |
| /external/llvm/lib/Target/XCore/ |
| XCoreInstrInfo.cpp | 66 return MI->getOperand(0).getReg();
88 return MI->getOperand(0).getReg();
291 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg())
300 BuildMI(&MBB, DL, get(Opc)).addReg(Cond[1].getReg())
|
| /dalvik/dexgen/src/com/android/dexgen/rop/code/ |
| RegisterSpecSet.java | 179 * {@code get(spec.getReg())}.
186 return get(spec.getReg());
245 specs[toRemove.getReg()] = null;
273 int reg = spec.getReg();
289 throw new IllegalArgumentException("spec.getReg() out of range");
|
| /dalvik/dx/src/com/android/dx/rop/code/ |
| RegisterSpecSet.java | 178 * {@code get(spec.getReg())}.
185 return get(spec.getReg());
244 specs[toRemove.getReg()] = null;
272 int reg = spec.getReg();
288 throw new IllegalArgumentException("spec.getReg() out of range");
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/MCTargetDesc/ |
| SIMCCodeEmitter.cpp | 144 return getRegBinaryCode(MO.getReg());
163 unsigned regCode = getRegBinaryCode(MI.getOperand(OpNo).getReg());
236 unsigned reg = MI.getOperand(opIdx).getReg();
|
| /external/dexmaker/src/dx/java/com/android/dx/rop/code/ |
| RegisterSpecSet.java | 178 * {@code get(spec.getReg())}.
185 return get(spec.getReg());
244 specs[toRemove.getReg()] = null;
272 int reg = spec.getReg();
288 throw new IllegalArgumentException("spec.getReg() out of range");
|
| /external/llvm/lib/Target/AArch64/Disassembler/ |
| AArch64Disassembler.cpp | 241 static unsigned getReg(const void *D, unsigned RC, unsigned RegNo) {
251 uint16_t Register = getReg(Decoder, AArch64::GPR64RegClassID, RegNo);
262 uint16_t Register = getReg(Decoder, AArch64::GPR64xspRegClassID, RegNo);
273 uint16_t Register = getReg(Decoder, AArch64::GPR32RegClassID, RegNo);
284 uint16_t Register = getReg(Decoder, AArch64::GPR32wspRegClassID, RegNo);
295 uint16_t Register = getReg(Decoder, AArch64::FPR8RegClassID, RegNo);
306 uint16_t Register = getReg(Decoder, AArch64::FPR16RegClassID, RegNo);
318 uint16_t Register = getReg(Decoder, AArch64::FPR32RegClassID, RegNo);
329 uint16_t Register = getReg(Decoder, AArch64::FPR64RegClassID, RegNo);
341 uint16_t Register = getReg(Decoder, AArch64::FPR128RegClassID, RegNo)
[all...] |
| /external/llvm/lib/Target/Hexagon/InstPrinter/ |
| HexagonInstPrinter.cpp | 94 O << getRegisterName(MO.getReg());
145 O << getRegisterName(MO0.getReg());
154 O << getRegisterName(MO0.getReg()) << ", #" << MO1.getImm();
|
| /external/llvm/lib/Target/R600/ |
| R600EmitClauseMarkers.cpp | 59 if (MO.isReg() && MO.getReg() == AMDGPU::ALU_LITERAL_X)
115 if (Consts[i].first->getReg() != AMDGPU::ALU_CONST)
143 if (Consts[i].first->getReg() != AMDGPU::ALU_CONST)
|
| R600InstrInfo.cpp | 247 unsigned Reg = MO.getReg();
270 unsigned Reg = MI->getOperand(SrcIdx).getReg();
298 unsigned Reg = Srcs[i].first->getReg();
567 if (Src.first->getReg() == AMDGPU::ALU_LITERAL_X)
571 if (Src.first->getReg() == AMDGPU::ALU_CONST)
573 if (AMDGPU::R600_KC0RegClass.contains(Src.first->getReg()) ||
574 AMDGPU::R600_KC1RegClass.contains(Src.first->getReg())) {
575 unsigned Index = RI.getEncodingValue(Src.first->getReg()) & 0xff;
576 unsigned Chan = RI.getHWRegChan(Src.first->getReg());
817 unsigned Reg = MI->getOperand(idx).getReg();
[all...] |
| /external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
| SIMCCodeEmitter.cpp | 144 return getRegBinaryCode(MO.getReg());
163 unsigned regCode = getRegBinaryCode(MI.getOperand(OpNo).getReg());
236 unsigned reg = MI.getOperand(opIdx).getReg();
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 72 if (TargetRegisterInfo::isPhysicalRegister(RN->getReg()))
116 unsigned DestReg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
199 unsigned Reg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
224 VRBase = cast<RegisterSDNode>(Node->getOperand(i-NumResults))->getReg();
236 unsigned Reg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
375 MIB.addReg(R->getReg(), getImplRegState(Imp));
463 unsigned DestReg = cast<RegisterSDNode>(User->getOperand(1))->getReg();
607 if (!R || !TargetRegisterInfo::isPhysicalRegister(R->getReg())) {
801 UsedRegs.push_back(cast<RegisterSDNode>(F->getOperand(1))->getReg());
[all...] |
