| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_sf_emit.c | 47 * Determine the vert_result corresponding to the given half of the given
48 * register. half=0 means the first half of a register, half=1 means the
49 * second half.
52 int half)
54 int vue_slot = (reg + c->urb_entry_read_offset) * 2 + half;
|
| /external/libvorbis/doc/ |
| 04-codec.tex | 301 \item if \varname{[previous_window_flag]} is not set, the left half
305 windows. Else, the left half window will have normal long
307 \item if \varname{[next_window_flag]} is not set, the right half of
586 one-half block consisting of and only of the overlapped portions. When
|
| /external/libvpx/libvpx/vp8/common/ppc/ |
| variance_altivec.asm | 52 ;# can be used. Only have a half word signed
|
| /external/libvpx/libvpx/vp8/encoder/ppc/ |
| fdct_altivec.asm | 22 ;# in normalization (fwd is twice unitary, inv is half unitary)
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_sf_emit.c | 47 * Determine the vert_result corresponding to the given half of the given
48 * register. half=0 means the first half of a register, half=1 means the
49 * second half.
52 int half)
54 int vue_slot = (reg + c->urb_entry_read_offset) * 2 + half;
|
| /prebuilts/python/darwin-x86/2.7.5/lib/python2.7/ |
| pickletools.py | 612 double, and "add a half and chop" rounding is used to reduce
[all...] |
| /prebuilts/python/linux-x86/2.7.5/lib/python2.7/ |
| pickletools.py | 612 double, and "add a half and chop" rounding is used to reduce
[all...] |
| /cts/tests/tests/webkit/src/android/webkit/cts/ |
| WebViewTest.java | [all...] |
| /external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/gallivm/ |
| lp_bld_tgsi_action.c | 919 LLVMValueRef half, tmp; local
920 half = lp_build_const_vec(bld_base->base.gallivm, bld_base->base.type, 0.5);
922 emit_data->args[2], half);
[all...] |
| lp_bld_sample.c | 944 LLVMValueRef half = lp_build_const_vec(coord_bld->gallivm, coord_bld->type, 0.5); local
[all...] |
| /external/mesa3d/src/gallium/auxiliary/gallivm/ |
| lp_bld_tgsi_action.c | 919 LLVMValueRef half, tmp; local
920 half = lp_build_const_vec(bld_base->base.gallivm, bld_base->base.type, 0.5);
922 emit_data->args[2], half);
[all...] |
| lp_bld_sample.c | 944 LLVMValueRef half = lp_build_const_vec(coord_bld->gallivm, coord_bld->type, 0.5); local
[all...] |
| /external/pixman/pixman/ |
| pixman-region.c | 1763 int half = num_ri \/ 2; local
[all...] |
| /system/core/libpixelflinger/codeflinger/ |
| ARMAssembler.cpp | 434 #pragma mark Byte/half word extract and extend (ARMv6+ only)...
|
| /art/runtime/arch/mips/ |
| quick_entrypoints_mips.S | 456 sw $v1, 4($t0) # store the other half of the result
460 s.s $f1, 4($t0) # store other half of floating point result
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/program/ |
| program_lexer.l | 275 {dot}half { return HALF; }
|
| /external/libvpx/libvpx/vpx_scale/arm/neon/ |
| vp8_vpxyv12_extendframeborders_neon.asm | 140 mov r1, r7 ; src_ptr1 needs to be saved for second half of loop
|
| /external/mesa3d/src/mesa/program/ |
| program_lexer.l | 275 {dot}half { return HALF; }
|
| /art/runtime/arch/arm/ |
| quick_entrypoints_arm.S | 570 mov r3, r2 @ pass one half of wide argument
571 mov r2, r1 @ pass other half of wide argument
[all...] |
| /build/tools/droiddoc/templates-ds/ |
| sdkpage.cs | 310 </div><!-- end col-13 for lower-half content -->
|
| /build/tools/droiddoc/templates-sac/ |
| sdkpage.cs | 309 </div><!-- end col-13 for lower-half content -->
|
| /external/chromium_org/third_party/icu/source/i18n/ |
| decNumber.c | 4732 Int half; \/* half to add to lower unit *\/ local
6961 Unit half=(Unit)powers[DECDPUN]>>1; local
[all...] |
| /external/icu4c/i18n/ |
| decNumber.c | 4755 Int half; \/* half to add to lower unit *\/ local
6992 Unit half=(Unit)powers[DECDPUN]>>1; local
[all...] |
| /build/tools/droiddoc/templates-sdk/ |
| sdkpage.cs | 385 </div><!-- end col-13 for lower-half content -->
|
| /external/chromium_org/third_party/mesa/src/docs/ |
| MESA_texture_array.spec | 70 traditional 3D texturing, the size of the N+1 LOD is half the size
[all...] |
