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    Searched refs:isReg (Results 101 - 125 of 163) sorted by null

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  /external/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp 305 bool isReg() const { return Kind == k_Register; }
532 assert(RegOp.isReg() && "expected register operand kind");
576 assert(SrcRegOp.isReg() && "expected register operand kind");
578 assert(DstRegOp.isReg() && "expected register operand kind");
618 assert(RegOp.isReg() && "expected register operand kind");
655 assert(Inst.getOperand(0).isReg() && "expected register operand kind");
658 assert(Inst.getOperand(1).isReg() && "expected register operand kind");
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  /external/llvm/lib/Target/X86/
X86FloatingPoint.cpp 331 assert(MO.isReg() && "Expected an FP register!");
445 if (MO.isReg() && MO.isDead())
    [all...]
  /external/llvm/lib/CodeGen/
LiveIntervalAnalysis.cpp 742 if (!MO->isReg())
828 if (MO->isReg() && MO->isUse())
    [all...]
EarlyIfConversion.cpp 233 if (!MO->isReg())
288 if (!MO->isReg())
InlineSpiller.cpp 846 if (MO.isReg() && MO.isUse() && MO.getReg() == VirtReg.reg)
    [all...]
MachineCopyPropagation.cpp 239 if (!MO.isReg())
VirtRegMap.cpp 284 if (!MO.isReg() || !TargetRegisterInfo::isVirtualRegister(MO.getReg()))
RegisterCoalescer.cpp 813 if (MO.isReg()) {
    [all...]
MachineTraceMetrics.cpp 644 if (!MO->isReg())
707 if (!MO->isReg())
    [all...]
  /external/llvm/lib/Target/ARM/
ARMCodeEmitter.cpp 265 if (!MO.isReg()) {
320 if (!MO.isReg()) {
475 if (MO.isReg())
    [all...]
ARMLoadStoreOptimizer.cpp 404 if (!MO->isReg() || !MO->isDef() || !MO->isImplicit() || MO->isDead())
518 if (!MO.isReg())
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  /external/llvm/lib/CodeGen/AsmPrinter/
DwarfCompileUnit.cpp 400 if (Location.isReg() && !Indirect)
404 if (Indirect && !Location.isReg()) {
424 if (Location.isReg()) {
442 if (!Location.isReg())
555 if (Location.isReg())
    [all...]
AsmPrinterInlineAsm.cpp 418 for (; MI->getOperand(NumDefs).isReg() && MI->getOperand(NumDefs).isDef();
  /external/llvm/lib/Target/Mips/
Mips16InstrInfo.cpp 344 if (MO.isReg() && MO.getReg() != 0 && !MO.isDef() &&
361 if (MO.isReg() && MO.isDef()) {
MipsDelaySlotFiller.cpp 276 if (!MO.isReg() || !MO.isDef() || !(R = MO.getReg()))
358 if (MO.isReg() && MO.getReg())
  /external/llvm/lib/Target/R600/
R600ControlFlowFinalizer.cpp 118 if (!MO.isReg())
236 if (MO.isReg() && MO.isInternalRead())
R600OptimizeVectorRegisters.cpp 274 if (!MOp->isReg())
  /external/llvm/include/llvm/CodeGen/
MachineRegisterInfo.h 77 assert(MO && MO->isReg() && "This is not a register operand!");
  /external/llvm/lib/Target/Hexagon/
HexagonFrameLowering.cpp 160 assert(MBBI->getOperand(0).isReg() && "Offset should be in register!");
HexagonInstrInfo.cpp 832 else if ( MI->getOperand(MI->getNumOperands()-1).isReg()
868 if (MO.isReg() && !MO.isUse() && !MO.isImplicit()) {
871 if (MO.isReg()) {
    [all...]
  /external/llvm/lib/Target/PowerPC/InstPrinter/
PPCInstPrinter.cpp 301 if (Op.isReg()) {
  /external/llvm/lib/Target/PowerPC/
PPCAsmPrinter.cpp 252 if (!MI->getOperand(OpNo).isReg() ||
254 !MI->getOperand(OpNo+1).isReg())
295 assert(MI->getOperand(OpNo).isReg());
    [all...]
PPCFrameLowering.cpp 122 if (!MO.isReg() || !PPC::VRRCRegClass.contains(MO.getReg()))
312 if (!MO.isReg())
    [all...]
  /external/llvm/lib/Target/AArch64/InstPrinter/
AArch64InstPrinter.cpp 374 if (Op.isReg()) {
  /external/llvm/lib/Target/AArch64/MCTargetDesc/
AArch64MCCodeEmitter.cpp 356 if (MO.isReg()) {

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