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  /external/mesa3d/src/mesa/drivers/dri/i965/
brw_disasm.c 309 [BRW_SFID_URB] = "urb",
318 [BRW_SFID_URB] = "urb",
    [all...]
brw_eu_emit.c 532 insn->bits3.urb.opcode = 0; /* ? */
533 insn->bits3.urb.offset = offset;
534 insn->bits3.urb.swizzle_control = swizzle_control;
535 insn->bits3.urb.allocate = allocate;
536 insn->bits3.urb.used = used; /* ? */
537 insn->bits3.urb.complete = complete;
    [all...]
brw_context.h 46 * URB - uniform resource buffer. A mid-sized buffer which is
50 * CURBE - constant URB entry. An urb region (entry) used to hold
54 * VUE - vertex URB entry. An urb entry holding a vertex and usually
58 * PUE - primitive URB entry. An urb entry produced by the setup (SF)
63 * urb) of the thread are preloaded to this area before the thread is
70 * MRF registers. All program output is via these messages. URB
71 * entries are populated by sending a message to the shared URB
852 } urb; member in struct:brw_context
    [all...]
gen6_blorp.cpp 170 * the URB. This is controlled by the 3DSTATE_VERTEX_BUFFERS and
185 * "Vertex URB Entry (VUE) Formats".
260 * Assign the entire URB to the VS. Even though the VS disabled, URB space
261 * is still needed because the clipper loads the VUE's from the URB. From
263 * Dword 1.15:0 "VS Number of URB Entries":
268 * Because of URB corruption caused by allocating a previous GS unit
269 * URB entry to the VS unit, software is required to send a ?GS NULL
270 * Fence? (Send URB fence with VS URB size == 1 and GS URB size == 0
    [all...]
brw_structs.h 1353 struct brw_urb_immediate urb; member in union:brw_instruction::__anon23738
    [all...]
  /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/
brw_eu_emit.c 532 insn->bits3.urb.opcode = 0; /* ? */
533 insn->bits3.urb.offset = offset;
534 insn->bits3.urb.swizzle_control = swizzle_control;
535 insn->bits3.urb.allocate = allocate;
536 insn->bits3.urb.used = used; /* ? */
537 insn->bits3.urb.complete = complete;
    [all...]
brw_context.h 46 * URB - uniform resource buffer. A mid-sized buffer which is
50 * CURBE - constant URB entry. An urb region (entry) used to hold
54 * VUE - vertex URB entry. An urb entry holding a vertex and usually
58 * PUE - primitive URB entry. An urb entry produced by the setup (SF)
63 * urb) of the thread are preloaded to this area before the thread is
70 * MRF registers. All program output is via these messages. URB
71 * entries are populated by sending a message to the shared URB
852 } urb; member in struct:brw_context
    [all...]
gen6_blorp.cpp 170 * the URB. This is controlled by the 3DSTATE_VERTEX_BUFFERS and
185 * "Vertex URB Entry (VUE) Formats".
260 * Assign the entire URB to the VS. Even though the VS disabled, URB space
261 * is still needed because the clipper loads the VUE's from the URB. From
263 * Dword 1.15:0 "VS Number of URB Entries":
268 * Because of URB corruption caused by allocating a previous GS unit
269 * URB entry to the VS unit, software is required to send a ?GS NULL
270 * Fence? (Send URB fence with VS URB size == 1 and GS URB size == 0
    [all...]
brw_structs.h 1353 struct brw_urb_immediate urb; member in union:brw_instruction::__anon13271
    [all...]
  /external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/
com.ibm.icu_4.2.1.v20100412.jar 
  /prebuilts/misc/common/icu4j/
icu4j.jar 

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