| /prebuilts/ndk/9/platforms/android-18/arch-x86/usr/include/linux/ |
| serio.h | 26 #define SERIO_HIL_MLC 0x03
33 #define SERIO_MS 0x03
|
| /prebuilts/ndk/9/platforms/android-3/arch-arm/usr/include/linux/ |
| serio.h | 26 #define SERIO_HIL_MLC 0x03
33 #define SERIO_MS 0x03
|
| /prebuilts/ndk/9/platforms/android-4/arch-arm/usr/include/linux/ |
| serio.h | 26 #define SERIO_HIL_MLC 0x03
33 #define SERIO_MS 0x03
|
| /prebuilts/ndk/9/platforms/android-5/arch-arm/usr/include/linux/ |
| serio.h | 26 #define SERIO_HIL_MLC 0x03
33 #define SERIO_MS 0x03
|
| /prebuilts/ndk/9/platforms/android-8/arch-arm/usr/include/linux/ |
| serio.h | 26 #define SERIO_HIL_MLC 0x03
33 #define SERIO_MS 0x03
|
| /prebuilts/ndk/9/platforms/android-9/arch-arm/usr/include/linux/ |
| serio.h | 26 #define SERIO_HIL_MLC 0x03
33 #define SERIO_MS 0x03
|
| /prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/linux/ |
| serio.h | 26 #define SERIO_HIL_MLC 0x03
33 #define SERIO_MS 0x03
|
| /prebuilts/ndk/9/platforms/android-9/arch-x86/usr/include/linux/ |
| serio.h | 26 #define SERIO_HIL_MLC 0x03
33 #define SERIO_MS 0x03
|
| /external/llvm/test/MC/ARM/ |
| arm_instructions.s | 22 @ CHECK: and r1, r2, r3 @ encoding: [0x03,0x10,0x02,0xe0]
25 @ CHECK: ands r1, r2, r3 @ encoding: [0x03,0x10,0x12,0xe0]
28 @ CHECK: eor r1, r2, r3 @ encoding: [0x03,0x10,0x22,0xe0]
31 @ CHECK: eors r1, r2, r3 @ encoding: [0x03,0x10,0x32,0xe0]
34 @ CHECK: sub r1, r2, r3 @ encoding: [0x03,0x10,0x42,0xe0]
37 @ CHECK: subs r1, r2, r3 @ encoding: [0x03,0x10,0x52,0xe0]
40 @ CHECK: add r1, r2, r3 @ encoding: [0x03,0x10,0x82,0xe0]
43 @ CHECK: adds r1, r2, r3 @ encoding: [0x03,0x10,0x92,0xe0]
46 @ CHECK: adc r1, r2, r3 @ encoding: [0x03,0x10,0xa2,0xe0]
49 @ CHECK: bic r1, r2, r3 @ encoding: [0x03,0x10,0xc2,0xe1
[all...] |
| arm-it-block.s | 11 @ CHECK: moveq r2, r3 @ encoding: [0x03,0x20,0xa0,0x01]
|
| /bionic/libc/kernel/common/linux/netfilter/ |
| xt_tcpudp.h | 49 #define XT_UDP_INV_MASK 0x03
|
| /bionic/libc/kernel/common/linux/ |
| pci.h | 32 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03)
|
| /development/ndk/platforms/android-3/include/linux/netfilter/ |
| xt_tcpudp.h | 40 #define XT_UDP_INV_MASK 0x03
|
| /development/ndk/platforms/android-3/include/linux/ |
| pci.h | 27 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03)
|
| /external/chromium_org/third_party/libwebp/dec/ |
| alpha.c | 52 method = (data[0] >> 0) & 0x03;
53 filter = (data[0] >> 2) & 0x03;
54 pre_processing = (data[0] >> 4) & 0x03;
55 rsrv = (data[0] >> 6) & 0x03;
|
| /external/iproute2/include/linux/netfilter/ |
| xt_tcpudp.h | 33 #define XT_UDP_INV_MASK 0x03 /* All possible flags. */
|
| /external/iptables/include/linux/netfilter/ |
| xt_tcpudp.h | 33 #define XT_UDP_INV_MASK 0x03 /* All possible flags. */
|
| /external/kernel-headers/original/linux/netfilter/ |
| xt_tcpudp.h | 33 #define XT_UDP_INV_MASK 0x03 /* All possible flags. */
|
| /external/libnfc-nci/halimpl/bcm2079x/include/ |
| bcm2079x.h | 33 #define BCMNFC_READ_FULL_PACKET _IO(BCMNFC_MAGIC, 0x03)
|
| /external/llvm/unittests/Support/ |
| EndianTest.cpp | 24 unsigned char bigval[] = {0x00, 0x01, 0x02, 0x03, 0x04};
25 unsigned char littleval[] = {0x00, 0x04, 0x03, 0x02, 0x01};
62 unsigned char big[] = {0x00, 0x01, 0x02, 0x03, 0x04};
63 unsigned char little[] = {0x00, 0x04, 0x03, 0x02, 0x01};
|
| /external/srtp/crypto/test/ |
| stat_driver.c | 41 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
42 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
43 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
44 0x00, 0x01, 0x02, 0x03, 0x04, 0x05
|
| /external/tcpdump/ |
| l2vpn.c | 34 { 0x03, "ATM transparent cell transport"},
|
| /external/webp/src/dec/ |
| alpha.c | 52 method = (data[0] >> 0) & 0x03;
53 filter = (data[0] >> 2) & 0x03;
54 pre_processing = (data[0] >> 4) & 0x03;
55 rsrv = (data[0] >> 6) & 0x03;
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/linux/netfilter/ |
| xt_tcpudp.h | 33 #define XT_UDP_INV_MASK 0x03 /* All possible flags. */
|
| /prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/linux/ |
| pci.h | 40 #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */
|
