/external/mesa3d/src/mesa/x86/ |
x86_cliptest.S | 72 D_BYTE 0x10, 0x11, 0x10, 0x12, 0x18, 0x19, 0x18, 0x1a 80 D_BYTE 0x1f, 0x1d, 0x1f, 0x1e, 0x1b, 0x19, 0x1b, 0x1a
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/external/oprofile/events/mips/74K/ |
events.h | 50 {0x1a, CTR(0) | CTR(2), 0, "LOAD_STORE_REPLAYS",
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/external/oprofile/events/mips/r12000/ |
events | 30 event:0x1a counters:0,1,2,3 um:zero minimum:500 name:SCACHE_MISSES : Secondary cache misses (data)
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/external/oprofile/events/mips/rm7000/ |
events | 30 event:0x1a counters:0,1 um:zero minimum:500 name:SLIP_CYCLES_PENDING_NON_BLKING_LOAD : Slip cycles due to pending non-blocking loads
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/external/oprofile/events/mips/rm9000/ |
events | 29 event:0x1a counters:0,1 um:zero minimum:500 name:NONBLOCKING_LOAD_SLIP_CYCLES : Slip cycles due to pending non-blocking loads
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/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/linux/ |
pci_regs.h | 120 #define PCI_SUBORDINATE_BUS 0x1a /* Highest bus number behind the bridge */ 162 #define PCI_CB_SUBORDINATE_BUS 0x1a /* Subordinate bus number */
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/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/linux/ |
pci_regs.h | 120 #define PCI_SUBORDINATE_BUS 0x1a /* Highest bus number behind the bridge */ 162 #define PCI_CB_SUBORDINATE_BUS 0x1a /* Subordinate bus number */
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/linux/ |
pci_regs.h | 120 #define PCI_SUBORDINATE_BUS 0x1a /* Highest bus number behind the bridge */ 162 #define PCI_CB_SUBORDINATE_BUS 0x1a /* Subordinate bus number */
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/prebuilts/ndk/4/platforms/android-3/arch-arm/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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/prebuilts/ndk/4/platforms/android-4/arch-arm/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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/prebuilts/ndk/4/platforms/android-5/arch-arm/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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/prebuilts/ndk/4/platforms/android-5/arch-x86/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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/prebuilts/ndk/4/platforms/android-8/arch-arm/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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/prebuilts/ndk/4/platforms/android-8/arch-x86/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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/prebuilts/ndk/5/platforms/android-3/arch-arm/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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/prebuilts/ndk/6/platforms/android-3/arch-arm/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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/prebuilts/ndk/6/platforms/android-3/arch-x86/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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/prebuilts/ndk/7/platforms/android-14/arch-arm/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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/prebuilts/ndk/7/platforms/android-14/arch-x86/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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/prebuilts/ndk/7/platforms/android-3/arch-arm/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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/prebuilts/ndk/7/platforms/android-3/arch-x86/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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/prebuilts/ndk/7/platforms/android-4/arch-arm/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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/prebuilts/ndk/7/platforms/android-4/arch-x86/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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/prebuilts/ndk/7/platforms/android-5/arch-arm/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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/prebuilts/ndk/7/platforms/android-5/arch-x86/usr/include/linux/ |
pci_regs.h | 96 #define PCI_SUBORDINATE_BUS 0x1a 136 #define PCI_CB_SUBORDINATE_BUS 0x1a
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