| /external/llvm/lib/CodeGen/ |
| LiveVariables.cpp | 198 unsigned SubReg = *SubRegs;
199 MachineInstr *Def = PhysRegDef[SubReg];
204 LastDefReg = SubReg;
252 unsigned SubReg = *SubRegs;
253 if (Processed.count(SubReg))
255 if (PartDefRegs.count(SubReg))
259 LastPartialDef->addOperand(MachineOperand::CreateReg(SubReg,
262 PhysRegDef[SubReg] = LastPartialDef;
263 for (MCSubRegIterator SS(SubReg, TRI); SS.isValid(); ++SS)
291 unsigned SubReg = *SubRegs
[all...] |
| ExpandPostRAPseudos.cpp | 98 DEBUG(dbgs() << "subreg: CONVERTING: " << *MI);
102 DEBUG(dbgs() << "subreg: replaced by: " << *MI);
115 DEBUG(dbgs() << "subreg: replace by: " << *MI);
118 DEBUG(dbgs() << "subreg: eliminated!");
127 DEBUG(dbgs() << "subreg: " << *CopyMI);
|
| MachineInstrBundle.cpp | 175 unsigned SubReg = *SubRegs;
176 if (LocalDefSet.insert(SubReg))
177 LocalDefs.push_back(SubReg);
|
| RegisterCoalescer.h | 89 /// the full register, but was a subreg operation.
|
| DeadMachineInstructionElim.cpp | 157 // Check the subreg set, not the alias set, because a def
|
| /external/llvm/lib/MC/ |
| MCRegisterInfo.cpp | 38 unsigned MCRegisterInfo::getSubRegIndex(unsigned Reg, unsigned SubReg) const {
39 assert(SubReg && SubReg < getNumRegs() && "This is not a register");
44 if (*Subs == SubReg)
|
| /external/llvm/lib/Target/ARM/ |
| Thumb2ITBlockPass.cpp | 76 for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true);
77 Subreg.isValid(); ++Subreg)
78 Uses.insert(*Subreg);
83 for (MCSubRegIterator Subreg(Reg, TRI, /*IncludeSelf=*/true);
84 Subreg.isValid(); ++Subreg)
85 Defs.insert(*Subreg);
|
| A15SDOptimizer.cpp | 158 // Get the subreg type that is most likely to be coalesced
271 // a subreg copy of a DPR, just use that DPR.
274 // Is it a subreg copy of ssub_0?
277 DEBUG(dbgs() << "Found a subreg copy: " << *SPRMI);
279 // Find the thing we're subreg copying out of - is it of the same
285 DEBUG(dbgs() << "Subreg copy is compatible - returning ");
|
| /external/llvm/lib/Target/SystemZ/ |
| SystemZRegisterInfo.h | 22 // Return the subreg to use for referring to the even and odd registers
|
| SystemZElimCompare.cpp | 108 // Return true if any CC result of MI would reflect the value of subreg
109 // SubReg of Reg.
110 static bool resultTests(MachineInstr *MI, unsigned Reg, unsigned SubReg) {
115 MI->getOperand(0).getSubReg() == SubReg)
132 MI->getOperand(1).getSubReg() == SubReg)
|
| /external/llvm/test/CodeGen/X86/ |
| 2011-02-21-VirtRegRewriter-KillSubReg.ll | 3 ; `KillOps[*SR] == KillOp && "invalid subreg kill flags"'
|
| /external/llvm/include/llvm/CodeGen/ |
| MachineOperand.h | 69 /// MO_Register has no subReg.
339 void setSubReg(unsigned subReg) {
341 SubReg_TargetFlags = subReg;
342 assert(SubReg_TargetFlags == subReg && "SubReg out of range");
346 /// subregister Reg:SubReg. Take any existing SubReg index into account,
347 /// using TargetRegisterInfo to compose the subreg indices if necessary.
353 /// Reg, taking any existing SubReg into account. For instance,
564 unsigned SubReg = 0
[all...] |
| MachineInstrBuilder.h | 65 unsigned SubReg = 0) const {
75 SubReg,
|
| /external/llvm/lib/Target/PowerPC/ |
| PPCRegisterInfo.td | 34 class GP8<GPR SubReg, string n> : PPCReg<n> {
35 let HWEncoding = SubReg.HWEncoding;
36 let SubRegs = [SubReg];
|
| /external/llvm/lib/Target/R600/ |
| R600OptimizeVectorRegisters.cpp | 12 /// common data and/or have enough undef subreg using swizzle abilities.
187 unsigned SubReg = (*It).first;
194 .addReg(SubReg)
196 UpdatedRegToChan[SubReg] = Chan;
|
| /external/llvm/include/llvm/Target/ |
| TargetRegisterInfo.h | 224 const char *const *SubRegIndexNames; // Names of subreg indexes.
496 /// compositions. If R does not have a subreg a, or R:a does not have a subreg
501 /// If you compose subreg indices dsub_1, ssub_0 you get ssub_2.
[all...] |
| TargetOpcodes.h | 75 // the REG_SEQUENCE, while each subsequent pair names a vreg + subreg index
|
| /external/clang/lib/StaticAnalyzer/Checkers/ |
| ArrayBoundCheckerV2.cpp | 276 if (const SubRegion *subReg = dyn_cast<SubRegion>(region)) {
279 return RegionRawOffsetV2(subReg, offset);
|
| /external/llvm/include/llvm/MC/ |
| MCRegisterInfo.h | 148 /// SubRegCoveredBits - Emitted by tablegen: bit range covered by a subreg
165 const uint16_t *SubRegIndices; // Pointer to the subreg lookup
167 const SubRegCoveredBits *SubRegIdxRanges; // Pointer to the subreg covered
169 unsigned NumSubRegIndices; // Number of subreg indices.
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.h | 90 /// EmitSubregNode - Generate machine code for subreg nodes.
|
| /external/llvm/utils/TableGen/ |
| CodeGenRegisters.h | 67 // Map of composite subreg indices.
70 // Returns the subreg index that results from composing this with Idx.
77 // Add a composite subreg index: this+A = B.
84 // Synthetic subreg indices that aren't contiguous (for instance ARM
|
| /prebuilts/gcc/darwin-x86/arm/arm-eabi-4.6/lib/gcc/arm-eabi/4.6.x-google/plugin/include/ |
| rtl.h | 257 1 in a SUBREG used for SUBREG_PROMOTED_UNSIGNED_P.
269 1 in a SUBREG used for SUBREG_PROMOTED_UNSIGNED_P.
280 1 in a SUBREG expression if was generated from a variable with a
[all...] |
| /prebuilts/gcc/darwin-x86/arm/arm-linux-androideabi-4.6/lib/gcc/arm-linux-androideabi/4.6.x-google/plugin/include/ |
| rtl.h | 257 1 in a SUBREG used for SUBREG_PROMOTED_UNSIGNED_P.
269 1 in a SUBREG used for SUBREG_PROMOTED_UNSIGNED_P.
280 1 in a SUBREG expression if was generated from a variable with a
[all...] |
| /prebuilts/gcc/linux-x86/arm/arm-eabi-4.6/lib/gcc/arm-eabi/4.6.x-google/plugin/include/ |
| rtl.h | 257 1 in a SUBREG used for SUBREG_PROMOTED_UNSIGNED_P.
269 1 in a SUBREG used for SUBREG_PROMOTED_UNSIGNED_P.
280 1 in a SUBREG expression if was generated from a variable with a
[all...] |
| /prebuilts/gcc/linux-x86/arm/arm-linux-androideabi-4.6/lib/gcc/arm-linux-androideabi/4.6.x-google/plugin/include/ |
| rtl.h | 257 1 in a SUBREG used for SUBREG_PROMOTED_UNSIGNED_P.
269 1 in a SUBREG used for SUBREG_PROMOTED_UNSIGNED_P.
280 1 in a SUBREG expression if was generated from a variable with a
[all...] |
