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    Searched full:active_fpu (Results 1 - 7 of 7) sorted by null

  /external/qemu/target-mips/
op_helper.c     [all...]
exec.h 92 if (env->active_fpu.fcr0 & (1 << FCR0_F64))
machine.c 52 save_fpu(f, &env->active_fpu);
202 load_fpu(f, &env->active_fpu);
translate_init.c 526 memcpy(&env->active_fpu, &env->fpus[0], sizeof(env->active_fpu));
translate.c 597 tcg_gen_ld_i32(t, cpu_env, offsetof(CPUState, active_fpu.fpr[reg].w[FP_ENDIAN_IDX]));
602 tcg_gen_st_i32(t, cpu_env, offsetof(CPUState, active_fpu.fpr[reg].w[FP_ENDIAN_IDX]));
607 tcg_gen_ld_i32(t, cpu_env, offsetof(CPUState, active_fpu.fpr[reg].w[!FP_ENDIAN_IDX]));
612 tcg_gen_st_i32(t, cpu_env, offsetof(CPUState, active_fpu.fpr[reg].w[!FP_ENDIAN_IDX]));
618 tcg_gen_ld_i64(t, cpu_env, offsetof(CPUState, active_fpu.fpr[reg].d));
633 tcg_gen_st_i64(t, cpu_env, offsetof(CPUState, active_fpu.fpr[reg].d));
    [all...]
cpu.h 175 CPUMIPSFPUContext active_fpu; member in struct:CPUMIPSState
  /external/qemu/
gdbstub.c 988 GET_REGL(env->active_fpu.fpr[n - 38].d);
990 GET_REGL(env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX]);
993 case 70: GET_REGL((int32_t)env->active_fpu.fcr31);
994 case 71: GET_REGL((int32_t)env->active_fpu.fcr0);
1024 set_float_rounding_mode(ieee_rm[env->active_fpu.fcr31 & 3], &env->active_fpu.fp_status)
1040 env->active_fpu.fpr[n - 38].d = tmp;
1042 env->active_fpu.fpr[n - 38].w[FP_ENDIAN_IDX] = tmp;
1046 env->active_fpu.fcr31 = tmp & 0xFF83FFFF;
1051 SET_FP_ENABLE(env->active_fpu.fcr31, 0)
    [all...]

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