/external/llvm/test/CodeGen/AArch64/ |
code-model-large-abs.ll | 23 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var8 24 ; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var8 25 ; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:var8 26 ; CHECK: movk x[[ADDR_REG]], #:abs_g0_nc:var8 27 ; CHECK: ldrb w0, [x[[ADDR_REG]]] 34 ; CHECK: movz x[[ADDR_REG:[0-9]+]], #:abs_g3:var16 35 ; CHECK: movk x[[ADDR_REG]], #:abs_g2_nc:var16 36 ; CHECK: movk x[[ADDR_REG]], #:abs_g1_nc:var16 37 ; CHECK: movk x[[ADDR_REG]], #:abs_g0_nc:var16 38 ; CHECK: ldrh w0, [x[[ADDR_REG]]] [all...] |
blockaddress.ll | 17 ; CHECK-LARGE: movz [[ADDR_REG:x[0-9]+]], #:abs_g3:[[DEST_LBL:.Ltmp[0-9]+]] 18 ; CHECK-LARGE: movk [[ADDR_REG]], #:abs_g2_nc:[[DEST_LBL]] 19 ; CHECK-LARGE: movk [[ADDR_REG]], #:abs_g1_nc:[[DEST_LBL]] 20 ; CHECK-LARGE: movk [[ADDR_REG]], #:abs_g0_nc:[[DEST_LBL]] 21 ; CHECK-LARGE: str [[ADDR_REG]],
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/external/qemu/tcg/arm/ |
tcg-target.c | 958 int addr_reg, data_reg, data_reg2, bswap; local 977 addr_reg = *args++; 986 * shr r8, addr_reg, #TARGET_PAGE_BITS 994 0, addr_reg, SHIFT_IMM_LSR(TARGET_PAGE_BITS)); 1017 0, addr_reg, (1 << s_bits) - 1); 1031 tcg_out_ld8_r(s, COND_EQ, data_reg, addr_reg, TCG_REG_R1); 1034 tcg_out_ld8s_r(s, COND_EQ, data_reg, addr_reg, TCG_REG_R1); 1037 tcg_out_ld16u_r(s, COND_EQ, data_reg, addr_reg, TCG_REG_R1); 1044 tcg_out_ld16u_r(s, COND_EQ, data_reg, addr_reg, TCG_REG_R1); 1047 tcg_out_ld16s_r(s, COND_EQ, data_reg, addr_reg, TCG_REG_R1) 1181 int addr_reg, data_reg, data_reg2, bswap; local [all...] |
/external/qemu/tcg/ppc64/ |
tcg-target.c | 570 int addr_reg, int s_bits, int offset) 573 tcg_out_rld (s, RLDICL, addr_reg, addr_reg, 0, 32); 577 | RS (addr_reg) 587 | RS (addr_reg) 594 tcg_out_rld (s, RLDICL, r0, addr_reg, 605 tcg_out_rld (s, RLDICR, r2, addr_reg, 0, 63 - TARGET_PAGE_BITS); 608 tcg_out_rld (s, RLDICL, r2, addr_reg, 619 int addr_reg, data_reg, r0, r1, rbase, mem_index, s_bits, bswap; local 626 addr_reg = *args++ 766 int addr_reg, r0, r1, rbase, data_reg, mem_index, bswap; local [all...] |
/external/qemu/tcg/sparc/ |
tcg-target.c | 751 int addr_reg, data_reg, arg0, arg1, arg2, mem_index, s_bits; local 757 addr_reg = *args++; 766 /* srl addr_reg, x, arg1 */ 767 tcg_out_arithi(s, arg1, addr_reg, TARGET_PAGE_BITS - CPU_TLB_ENTRY_BITS, 769 /* and addr_reg, x, arg0 */ 770 tcg_out_arithi(s, arg0, addr_reg, TARGET_PAGE_MASK | ((1 << s_bits) - 1), 798 tcg_out_mov(s, TCG_TYPE_PTR, arg0, addr_reg); 878 /* and addr_reg, x, arg0 */ 880 tcg_out_arith(s, arg0, addr_reg, TCG_REG_I5, ARITH_AND); 884 /* add addr_reg, arg1, arg0 * 961 int addr_reg, data_reg, arg0, arg1, arg2, mem_index, s_bits; local [all...] |
/external/qemu/tcg/x86_64/ |
tcg-target.c | 560 int addr_reg, data_reg, r0, r1, mem_index, s_bits, bswap, rexw; local 567 addr_reg = *args++; 581 tcg_out_modrm(s, 0x8b | rexw, r1, addr_reg); 584 tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg); 603 tcg_out_modrm(s, 0x8b | rexw, r0, addr_reg); 659 r0 = addr_reg; 667 /* addq addr_reg, r0 */ 668 tcg_out_modrm(s, 0x01 | P_REXW, addr_reg, r0); 754 int addr_reg, data_reg, r0, r1, mem_index, s_bits, bswap, rexw; local 761 addr_reg = *args++ [all...] |
/external/qemu/tcg/hppa/ |
tcg-target.c | 904 r1 = addr_reg >> TARGET_PAGE_BITS; 954 int addr_reg, int addend_reg, int opc) 964 tcg_out_ldst_index(s, datalo_reg, addr_reg, addend_reg, INSN_LDBX); 967 tcg_out_ldst_index(s, datalo_reg, addr_reg, addend_reg, INSN_LDBX); 971 tcg_out_ldst_index(s, datalo_reg, addr_reg, addend_reg, INSN_LDHX); 977 tcg_out_ldst_index(s, datalo_reg, addr_reg, addend_reg, INSN_LDHX); 985 tcg_out_ldst_index(s, datalo_reg, addr_reg, addend_reg, INSN_LDWX); 999 tcg_out_arith(s, TCG_REG_R20, addr_reg, addend_reg, INSN_ADD); 1000 addr_reg = TCG_REG_R20; 1003 if (datahi_reg == addr_reg) { [all...] |
/external/qemu/tcg/ppc/ |
tcg-target.c | 529 int addr_reg, data_reg, data_reg2, r0, r1, rbase, mem_index, s_bits, bswap; local 543 addr_reg = *args++; 558 | RS (addr_reg) 573 | RS (addr_reg) 594 tcg_out_mov (s, TCG_TYPE_I32, 3, addr_reg); 598 tcg_out_mov (s, TCG_TYPE_I32, 4, addr_reg); 650 tcg_out32 (s, ADD | RT (r0) | RA (r0) | RB (addr_reg)); 654 r0 = addr_reg; 726 int addr_reg, r0, r1, data_reg, data_reg2, mem_index, bswap, rbase; local 740 addr_reg = *args++ [all...] |
/hardware/invensense/60xx/libsensors_iio/software/core/driver/include/ |
mlsl.h | 159 unsigned char addr_reg, 179 unsigned char addr_reg,
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/hardware/invensense/65xx/libsensors_iio/software/core/driver/include/ |
mlsl.h | 159 unsigned char addr_reg, 179 unsigned char addr_reg,
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/external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
brw_vs_emit.c | 1094 struct brw_reg addr_reg = c->regs[PROGRAM_ADDRESS][0]; local 1172 struct brw_reg addr_reg = c->regs[PROGRAM_ADDRESS][0]; local 1209 struct brw_reg addr_reg = c->regs[PROGRAM_ADDRESS][0]; local [all...] |
/external/mesa3d/src/mesa/drivers/dri/i965/ |
brw_vs_emit.c | 1094 struct brw_reg addr_reg = c->regs[PROGRAM_ADDRESS][0]; local 1172 struct brw_reg addr_reg = c->regs[PROGRAM_ADDRESS][0]; local 1209 struct brw_reg addr_reg = c->regs[PROGRAM_ADDRESS][0]; local [all...] |
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
SIInstrInfo.td | 109 def ADDR_Reg : ComplexPattern<i64, 2, "SelectADDRReg", [], []>; 502 [(set (vt dstClass:$dst), (constant_load ADDR_Reg:$src0))]
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/external/mesa3d/src/gallium/drivers/radeon/ |
SIInstrInfo.td | 109 def ADDR_Reg : ComplexPattern<i64, 2, "SelectADDRReg", [], []>; 502 [(set (vt dstClass:$dst), (constant_load ADDR_Reg:$src0))]
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/external/chromium_org/v8/src/ia32/ |
macro-assembler-ia32.cc | [all...] |
macro-assembler-ia32.h | [all...] |
/external/v8/src/arm/ |
macro-assembler-arm.cc | [all...] |
/external/v8/src/ia32/ |
macro-assembler-ia32.cc | [all...] |
macro-assembler-ia32.h | [all...] |
/external/chromium_org/v8/src/arm/ |
macro-assembler-arm.cc | [all...] |
macro-assembler-arm.h | [all...] |
/external/chromium_org/v8/src/x64/ |
macro-assembler-x64.cc | [all...] |
macro-assembler-x64.h | [all...] |
/external/v8/src/x64/ |
macro-assembler-x64.cc | [all...] |
/external/chromium_org/v8/src/mips/ |
macro-assembler-mips.h | [all...] |