/external/llvm/lib/Target/Sparc/ |
SparcInstrInfo.td | 90 def CCOp : Operand<i32>; 151 // Note that these values must be kept in sync with the CCOp::CondCode enum 534 def BCOND : BranchSP<0, (ins brtarget:$dst, CCOp:$cc), 551 def FBCOND : FPBranchSP<0, (ins brtarget:$dst, CCOp:$cc), 719 : Pseudo<(outs IntRegs:$rd), (ins IntRegs:$rs2, IntRegs:$f, CCOp:$cc), 723 : Pseudo<(outs IntRegs:$rd), (ins i32imm:$i, IntRegs:$f, CCOp:$cc), 730 : Pseudo<(outs IntRegs:$rd), (ins IntRegs:$rs2, IntRegs:$f, CCOp:$cc), 734 : Pseudo<(outs IntRegs:$rd), (ins i32imm:$i, IntRegs:$f, CCOp:$cc), 741 : Pseudo<(outs FPRegs:$rd), (ins FPRegs:$rs2, FPRegs:$f, CCOp:$cc), 745 : Pseudo<(outs DFPRegs:$rd), (ins DFPRegs:$rs2, DFPRegs:$f, CCOp:$cc) [all...] |
SparcInstr64Bit.td | 315 def BPXCC : BranchSP<0, (ins brtarget:$dst, CCOp:$cc), 322 (ins IntRegs:$rs2, IntRegs:$f, CCOp:$cond), 327 (ins i32imm:$i, IntRegs:$f, CCOp:$cond), 332 (ins FPRegs:$rs2, FPRegs:$f, CCOp:$cond), 337 (ins DFPRegs:$rs2, DFPRegs:$f, CCOp:$cond),
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
SIISelLowering.cpp | 420 ISD::CondCode CCOp = dyn_cast<CondCodeSDNode>(CC)->get(); 428 && CCOp == ISD::SETNE) { 430 DAG.getConstant(0, MVT::i1), CCOp, true, DCI, DL);
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/external/mesa3d/src/gallium/drivers/radeon/ |
SIISelLowering.cpp | 420 ISD::CondCode CCOp = dyn_cast<CondCodeSDNode>(CC)->get(); 428 && CCOp == ISD::SETNE) { 430 DAG.getConstant(0, MVT::i1), CCOp, true, DCI, DL);
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/external/valgrind/main/VEX/priv/ |
guest_amd64_toIR.c | [all...] |
guest_x86_toIR.c | 918 Int ccOp = ty==Ity_I8 ? 0 : (ty==Ity_I16 ? 1 : 2); 923 case Iop_Add8: ccOp += X86G_CC_OP_ADDB; break; 924 case Iop_Sub8: ccOp += X86G_CC_OP_SUBB; break; 928 stmt( IRStmt_Put( OFFB_CC_OP, mkU32(ccOp)) ); 942 Int ccOp = ty==Ity_I8 ? 0 : (ty==Ity_I16 ? 1 : 2); 949 case Iop_Xor8: ccOp += X86G_CC_OP_LOGICB; break; 953 stmt( IRStmt_Put( OFFB_CC_OP, mkU32(ccOp)) ); 972 Int ccOp = ty==Ity_I8 ? 2 : (ty==Ity_I16 ? 1 : 0); 981 case Iop_Sar32: ccOp = X86G_CC_OP_SHRL - ccOp; break [all...] |
/external/llvm/lib/Target/R600/ |
SIISelLowering.cpp | 577 ISD::CondCode CCOp = dyn_cast<CondCodeSDNode>(CC)->get(); 585 && CCOp == ISD::SETNE) { 587 DAG.getConstant(0, MVT::i1), CCOp, true, DCI, DL); [all...] |
/external/llvm/lib/Target/ARM/ |
ARMISelLowering.cpp | [all...] |
/external/llvm/lib/Target/ARM/AsmParser/ |
ARMAsmParser.cpp | 321 struct CCOp { 427 struct CCOp CC; [all...] |