| /external/valgrind/main/none/tests/ppc32/ |
| power5+_round.stdout.exp | 0 frin inf inf 0 PASS
2 frin 1.9 2 0 PASS
3 frin 1.1 1 0 PASS
4 frin 0 0 0 PASS
5 frin -0 -0 0 PASS
6 frin -1.1 -1 0 PASS
7 frin -1.9 -2 0 PASS
8 frin -inf -inf 0 PASS
9 frin nan nan 0 PASS
10 frin 0.9 1 0 PAS
[all...] |
| power5+_round.c | 85 double frin[] = { inf, 2.0, 1.0, 0, neg0, -1.0, -2.0, -inf, nan }; local
110 DO_TEST(frin, set, frin, fprf);
111 DO_TEST(frin, set2, frin2, frin2rf);
|
| /external/llvm/test/CodeGen/PowerPC/ |
| rounding-ops.ll | 37 ; CHECK-NOT: frin
40 ; CHECK-FM: frin 1, 1
50 ; CHECK-NOT: frin
53 ; CHECK-FM: frin 1, 1
116 ; CHECK-NOT: frin
119 ; CHECK-FM: frin [[R2:[0-9]+]], [[R1:[0-9]+]]
135 ; CHECK-NOT: frin
138 ; CHECK-FM: frin [[R2:[0-9]+]], [[R1:[0-9]+]]
|
| /external/llvm/test/MC/PowerPC/ |
| ppc64-encoding-fp.s | 214 # CHECK: frin 2, 3 # encoding: [0xfc,0x40,0x1b,0x10]
215 frin 2, 3
216 # CHECK: frin. 2, 3 # encoding: [0xfc,0x40,0x1b,0x11]
217 frin. 2, 3
|
| /frameworks/av/media/libeffects/preprocessing/ |
| PreProcessing.cpp | [all...] |
| /external/llvm/lib/Target/PowerPC/ |
| PPCInstrInfo.td | [all...] |
| PPCISelLowering.cpp | 164 // frin does not implement "ties to even." Thus, this is safe only in
[all...] |
| /external/valgrind/main/VEX/pub/ |
| libvex_ir.h | 730 Iop_RoundF64toF64_NEAREST, /* frin */
[all...] |
| /external/qemu/ |
| ppc-dis.c | [all...] |
| /external/valgrind/main/VEX/priv/ |
| host_ppc_defs.c | 630 case Pfp_FRIN: return "frin";
[all...] |
| guest_ppc_toIR.c | [all...] |
