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  /art/runtime/
disassembler_arm.cc 747 // |111|10|S|cond| imm6 |1|0|J1|0|J2| imm11 |
752 uint32_t imm11 = instr & 0x7FF; local
754 int32_t imm32 = (S << 20) | (J2 << 19) | (J1 << 18) | (imm6 << 12) | (imm11 << 1);
786 // |111|10|S|cond| imm6 |10|J1|0|J2| imm11 |
787 // |111|10|S| imm10 |10|J1|1|J2| imm11 |
795 uint32_t imm11 = instr & 0x7FF; local
800 imm32 = (S << 20) | (J2 << 19) | (J1 << 18) | (imm6 << 12) | (imm11 << 1);
805 imm32 = (S << 24) | (I1 << 23) | (I2 << 22) | (imm10 << 12) | (imm11 << 1);
820 // |111|10|S| imm10 |11|J1|L|J2| imm11 |
826 uint32_t imm11 = instr & 0x7FF local
1340 uint16_t imm11 = instr & 0x7FFF; local
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  /external/chromium_org/courgette/
disassembler_elf_32_arm.cc 70 temp |= (arm_op & 0x000007FF) << 1; // imm11
109 temp |= (arm_op & 0x000007FF) << 1; // imm11
  /external/llvm/lib/Target/ARM/MCTargetDesc/
ARMAsmBackend.cpp 380 out |= (Value & 0x0007FF); // imm11 field
395 out |= (Value & 0x007FF); // imm11 field
404 // imm32 = SignExtend(S:I1:I2:imm10:imm11:0)
  /external/llvm/lib/Target/Mips/
Mips16InstrFormats.td 100 // Format I instruction class in Mips : <|opcode|imm11|>
107 bits<11> imm11;
111 let Inst{10-0} = imm11;
  /external/llvm/lib/Target/ARM/Disassembler/
ARMDisassembler.cpp 2152 unsigned imm11 = fieldFromInstruction(Insn, 0, 11); local
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  /art/compiler/dex/quick/arm/
assemble_arm.cc 1368 uint32_t imm11 = operand & 0x07ff; local
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arm_lir.h 407 kThumb2BCond, // b<c> [1110] S cond[25-22] imm6[21-16] [10] J1 [0] J2 imm11[10..0].
  /dalvik/vm/compiler/codegen/arm/
ArmLIR.h 589 J1 [0] J2 imm11[10..0] */
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  /external/qemu/
mips-dis.c 902 The I format uses IMM11.
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