/external/kernel-headers/original/linux/ |
vmalloc.h | 10 #define VM_IOREMAP 0x00000001 /* ioremap() and friends */ 15 /* bits [20..32] reserved for arch specific ioremap internals */ 18 * Maximum alignment for ioremap() regions.
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/external/kernel-headers/original/asm-mips/mips-boards/ |
malta.h | 37 #define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000)) 44 return (unsigned long) ioremap (((addr & 0xffff) << 21), 0x10000); 51 return (unsigned long) ioremap(addr, 0x10000);
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generic.h | 72 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f) 88 #define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff)
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/bionic/libc/kernel/arch-mips/asm/mips-boards/ |
generic.h | 51 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f) 64 #define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff)
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malta.h | 30 #define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000))
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/development/ndk/platforms/android-9/arch-mips/include/asm/mips-boards/ |
generic.h | 51 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f) 64 #define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff)
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malta.h | 30 #define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000))
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/prebuilts/ndk/8/platforms/android-14/arch-mips/usr/include/asm/mips-boards/ |
generic.h | 51 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f) 64 #define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff)
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malta.h | 30 #define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000))
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/prebuilts/ndk/8/platforms/android-9/arch-mips/usr/include/asm/mips-boards/ |
generic.h | 51 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f) 64 #define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff)
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malta.h | 30 #define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000))
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/prebuilts/ndk/9/platforms/android-14/arch-mips/usr/include/asm/mips-boards/ |
generic.h | 51 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f) 64 #define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff)
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malta.h | 30 #define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000))
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/prebuilts/ndk/9/platforms/android-18/arch-mips/usr/include/asm/mips-boards/ |
generic.h | 51 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f) 64 #define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff)
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malta.h | 30 #define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000))
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/prebuilts/ndk/9/platforms/android-9/arch-mips/usr/include/asm/mips-boards/ |
generic.h | 51 #define MIPS_REVISION_CORID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 10) & 0x3f) 64 #define MIPS_REVISION_SCONID (((*(volatile u32 *)ioremap(MIPS_REVISION_REG, 4)) >> 24) & 0xff)
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malta.h | 30 #define MALTA_BONITO_PORT_BASE ((unsigned long)ioremap (0x1fd00000, 0x10000))
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/external/kernel-headers/original/asm-arm/ |
io.h | 58 * Architecture ioremap implementation. 159 * These perform PCI memory accesses via an ioremap region. They don't 229 * ioremap and friends. 231 * ioremap takes a PCI memory address, as specified in 236 #define ioremap(cookie,size) __ioremap(cookie,size,0) macro 241 #define ioremap(cookie,size) __arch_ioremap((cookie),(size),0) macro
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/external/kernel-headers/original/asm-x86/ |
io_32.h | 106 * ioremap - map bus memory into CPU space 110 * ioremap performs a platform specific sequence of operations to 120 static inline void __iomem * ioremap(unsigned long offset, unsigned long size) function 130 * mappings, before the real ioremap() is functional. 222 * explicitly ioremap() it. The fact that the ISA IO space is mapped
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fixmap_32.h | 93 /* temporary boot-time mappings, used before ioremap() is functional */
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/external/kernel-headers/original/asm-mips/ |
io.h | 29 #include <ioremap.h> 218 * ioremap - map bus memory into CPU space 222 * ioremap performs a platform specific sequence of operations to 228 #define ioremap(offset, size) \ macro 242 * This version of ioremap ensures that the memory is marked uncachable 264 * This version of ioremap ensures that the memory is marked cachable by 272 * These two are MIPS specific ioremap variant. ioremap_cacheable_cow
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/external/iptables/extensions/ |
libxt_osf.c | 2 * Copyright (c) 2003+ Evgeniy Polyakov <zbr@ioremap.net>
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/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.4.3/sysroot/usr/include/linux/ |
serial.h | 32 unsigned long iomap_base; /* cookie passed into ioremap */
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/prebuilts/gcc/linux-x86/host/i686-linux-glibc2.7-4.6/sysroot/usr/include/linux/ |
serial.h | 32 unsigned long iomap_base; /* cookie passed into ioremap */
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/prebuilts/gcc/linux-x86/host/x86_64-linux-glibc2.7-4.6/sysroot/usr/include/linux/ |
serial.h | 32 unsigned long iomap_base; /* cookie passed into ioremap */
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