/art/compiler/dex/quick/mips/ |
codegen_mips.h | 33 LIR* LoadBaseDisp(int rBase, int displacement, int r_dest, OpSize size, int s_reg);
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utility_mips.cc | 532 LIR* MipsMir2Lir::LoadBaseDisp(int rBase, int displacement, int r_dest,
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/art/compiler/dex/quick/arm/ |
codegen_arm.h | 32 LIR* LoadBaseDisp(int rBase, int displacement, int r_dest, OpSize size, int s_reg);
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int_arm.cc | 818 LoadBaseDisp(reg_ptr, data_offset, rl_result.low_reg, size, INVALID_SREG); [all...] |
utility_arm.cc | 891 LIR* ArmMir2Lir::LoadBaseDisp(int rBase, int displacement, int r_dest, [all...] |
/art/compiler/dex/quick/x86/ |
codegen_x86.h | 33 LIR* LoadBaseDisp(int rBase, int displacement, int r_dest, OpSize size, int s_reg);
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utility_x86.cc | 451 LIR* X86Mir2Lir::LoadBaseDisp(int rBase, int displacement,
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/dalvik/vm/compiler/codegen/ |
CodegenFactory.cpp | 38 return loadBaseDisp(cUnit, NULL, rBase, displacement, rDest, kWord,
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/art/compiler/dex/quick/ |
gen_loadstore.cc | 79 return LoadBaseDisp(rBase, displacement, r_dest, kWord,
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mir_to_lir.h | 531 virtual LIR* LoadBaseDisp(int rBase, int displacement, int r_dest, OpSize size, int s_reg) = 0; [all...] |
gen_common.cc | 683 LoadBaseDisp(rl_obj.low_reg, field_offset, rl_result.low_reg, [all...] |
/dalvik/vm/compiler/codegen/mips/ |
CodegenFactory.cpp | 32 return loadBaseDisp(cUnit, NULL, rBase, displacement, rDest, kWord,
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CodegenDriver.cpp | 427 loadBaseDisp(cUnit, mir, rlObj.lowReg, fieldOffset, rlResult.lowReg, 523 loadBaseDisp(cUnit, mir, regPtr, dataOffset, rlResult.lowReg, [all...] |
/dalvik/vm/compiler/codegen/arm/Thumb/ |
Factory.cpp | 697 static ArmLIR *loadBaseDisp(CompilationUnit *cUnit, MIR *mir, int rBase,
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/dalvik/vm/compiler/codegen/mips/Mips32/ |
Factory.cpp | 702 static MipsLIR *loadBaseDisp(CompilationUnit *cUnit, MIR *mir, int rBase,
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/dalvik/vm/compiler/codegen/arm/Thumb2/ |
Factory.cpp | [all...] |
/dalvik/vm/compiler/codegen/arm/ |
CodegenDriver.cpp | 361 loadBaseDisp(cUnit, mir, rlObj.lowReg, fieldOffset, rlResult.lowReg, [all...] |