| /external/chromium_org/third_party/WebKit/Source/web/tests/data/viewport/ |
| viewport-15.html | 2 <title>Viewport META with "minimum-scale=1".</title>
3 <meta name="viewport" content="minimum-scale=1">
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| viewport-16.html | 2 <title>Viewport META with "minimum-scale=8".</title>
3 <meta name="viewport" content="minimum-scale=8">
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| viewport-17.html | 2 <title>Viewport META with "minimum-scale=10".</title>
3 <meta name="viewport" content="minimum-scale=10">
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| viewport-133.html | 2 <title>Viewport META with semi-colons "minimum-scale=10; maximum-scale=0.1".</title>
3 <meta name="viewport" content="minimum-scale=10; maximum-scale=0.1">
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| viewport-18.html | 2 <title>Viewport META with "minimum-scale=8, initial-scale=6".</title>
3 <meta name="viewport" content="minimum-scale=8, initial-scale=6">
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| viewport-19.html | 2 <title>Viewport META with "initial-scale=1, minimum-scale=2".</title>
3 <meta name="viewport" content="initial-scale=1, minimum-scale=2">
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| viewport-20.html | 2 <title>Viewport META with "minimum-scale=10, maximum-scale=0.1".</title>
3 <meta name="viewport" content="minimum-scale=10, maximum-scale=0.1">
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| viewport-21.html | 2 <title>Viewport META with "maximum-scale=0.1, minimum-scale=10".</title>
3 <meta name="viewport" content="maximum-scale=0.1, minimum-scale=10">
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| viewport-22.html | 2 <title>Viewport META with "minimum-scale=10, maximum-scale=1".</title>
3 <meta name="viewport" content="minimum-scale=10, maximum-scale=1">
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| viewport-23.html | 2 <title>Viewport META with "minimum-scale=3, maximum-scale=2".</title>
3 <meta name="viewport" content="minimum-scale=3, maximum-scale=2">
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| viewport-24.html | 2 <title>Viewport META with "maximum-scale=3, minimum-scale=4".</title>
3 <meta name="viewport" content="maximum-scale=3, minimum-scale=4">
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| viewport-25.html | 2 <title>Viewport META with "maximum-scale=10, minimum-scale=10".</title>
3 <meta name="viewport" content="maximum-scale=10, minimum-scale=10">
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| viewport-26.html | 2 <title>Viewport META with "minimum-scale=8, maximum-scale=9".</title>
3 <meta name="viewport" content="minimum-scale=8, maximum-scale=9">
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| viewport-45.html | 2 <title>Viewport META with "minimum-scale=0, maximum-scale=0".</title>
3 <meta name="viewport" content="minimum-scale=0, maximum-scale=0">
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| viewport-58.html | 2 <title>Check that minimum-scale=no is 0.</title>
3 <meta name="viewport" content="minimum-scale=no, initial-scale=0">
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| /external/oprofile/events/mips/loongson2/ |
| events | 3 event:0x00 counters:0 um:zero minimum:10000 name:CPU_CLK_UNHALTED : Cycles outside of haltstate
4 event:0x01 counters:0 um:zero minimum:5000 name:BRANCH_INSTRUCTIONS : Branch instructions
5 event:0x02 counters:0 um:zero minimum:400 name:JUMP_INSTRUCTIONS : JR instructions
6 event:0x03 counters:0 um:zero minimum:500 name:JR31_INSTRUCTIONS : JR(rs=31) instructions
7 event:0x04 counters:0 um:zero minimum:500 name:ICACHE_MISSES : Instruction cache misses
8 event:0x05 counters:0 um:zero minimum:500 name:ALU1_ISSUED : ALU1 operation issued
9 event:0x06 counters:0 um:zero minimum:8000 name:MEM_ISSUED : Memory read/write issued
10 event:0x07 counters:0 um:zero minimum:300 name:FALU1_ISSUED : Float ALU1 operation issued
11 event:0x08 counters:0 um:zero minimum:200 name:BHT_BRANCH_INSTRUCTIONS : BHT prediction instructions
12 event:0x09 counters:0 um:zero minimum:200 name:MEM_READ : Read from primary memor
[all...] |
| /external/oprofile/events/mips/rm9000/ |
| events | 4 event:0x00 counters:0,1 um:zero minimum:500 name:CYCLES : Processor clock cycles
5 event:0x01 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS_ISSUED : Instructions issued
6 event:0x02 counters:0,1 um:zero minimum:500 name:FP_INSTRUCTIONS_ISSUED : Floating-point instructions issued
7 event:0x03 counters:0,1 um:zero minimum:500 name:INT_INSTRUCTIONS_ISSUED : Integer instructions issued
8 event:0x04 counters:0,1 um:zero minimum:500 name:LOAD_INSTRUCTIONS_ISSUED : Load instructions issued
9 event:0x05 counters:0,1 um:zero minimum:500 name:STORE_INSTRUCTIONS_ISSUED : Store instructions issued
10 event:0x06 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS_DUAL_ISSUED : Dual-issued instruction pairs
11 event:0x07 counters:0,1 um:zero minimum:500 name:BRANCH_MISSPREDICTS : Branch mispredictions
12 event:0x09 counters:0,1 um:zero minimum:500 name:STALL_CYCLES : Stall cycles
13 event:0x0a counters:0,1 um:zero minimum:500 name:L2_CACHE_MISSES : L2 cache misse
[all...] |
| /external/oprofile/events/mips/vr5500/ |
| events | 6 event:0x0 counters:0,1 um:zero minimum:500 name:CYCLES : Processor clock cycles
7 event:0x1 counters:0,1 um:zero minimum:500 name:INSTRUCTIONS_EXECUTED : Instructions executed
8 event:0x2 counters:0,1 um:zero minimum:500 name:LOAD_PREF_CACHE_INSTRUCTIONS : Execution of load/prefetch/cache instruction
9 event:0x3 counters:0,1 um:zero minimum:500 name:STORES : Execution of store instruction
10 event:0x4 counters:0,1 um:zero minimum:500 name:BRANCHES : Execution of branch instruction
11 event:0x5 counters:0,1 um:zero minimum:500 name:FP_INSTRUCTIONS : Execution of floating-point instruction
12 event:0x6 counters:0,1 um:zero minimum:500 name:DOUBLEWORDS_FLUSHED : Doubleword flush to main memory
13 event:0x7 counters:0,1 um:zero minimum:500 name:JTLB_REFILLS : TLB refill
14 event:0x8 counters:0,1 um:zero minimum:500 name:DCACHE_MISSES : Data cache miss
15 event:0x9 counters:0,1 um:zero minimum:500 name:ICACHE_MISSES : Instruction cache mis
[all...] |
| /external/oprofile/events/alpha/ev5/ |
| events | 3 event:0x00 counters:0,2 um:zero minimum:256 name:CYCLES : Total cycles
4 event:0x01 counters:0 um:zero minimum:256 name:ISSUES : Total issues
5 event:0x02 counters:1 um:zero minimum:256 name:NON_ISSUE_CYCLES : Nothing issued, pipeline frozen
6 event:0x03 counters:1 um:zero minimum:256 name:SPLIT_ISSUE_CYCLES : Some but not all issuable instructions issued
7 event:0x04 counters:1 um:zero minimum:256 name:PIPELINE_DRY : Nothing issued, pipeline dry
8 event:0x05 counters:1 um:zero minimum:256 name:REPLAY_TRAP : Replay traps (ldu, wb/maf, litmus test)
9 event:0x06 counters:1 um:zero minimum:256 name:SINGLE_ISSUE_CYCLES : Single issue cycles
10 event:0x07 counters:1 um:zero minimum:256 name:DUAL_ISSUE_CYCLES : Dual issue cycles
11 event:0x08 counters:1 um:zero minimum:256 name:TRIPLE_ISSUE_CYCLES : Triple issue cycles
12 event:0x09 counters:1 um:zero minimum:256 name:QUAD_ISSUE_CYCLES : Quad issue cycle
[all...] |
| /external/easymock/src/org/easymock/internal/ |
| Range.java | 24 private final int minimum;
field in class:Range
32 public Range(int minimum, int maximum) {
33 if (!(minimum <= maximum)) {
35 "minimum must be <= maximum"));
38 if (!(minimum >= 0)) {
40 "minimum must be >= 0"));
47 this.minimum = minimum;
52 return minimum == maximum;
60 return minimum;
[all...] |
| /external/oprofile/events/i386/atom/ |
| events | 5 event:0x3c counters:0,1 um:cpu_clk_unhalted minimum:6000 name:CPU_CLK_UNHALTED : Clock cycles when not halted
6 event:0x3c counters:0,1 um:one minimum:6000 name:UNHALTED_REFERENCE_CYCLES : Unhalted reference cycles
7 event:0xc0 counters:0,1 um:one minimum:6000 name:INST_RETIRED : number of instructions retired
8 event:0x2e counters:0,1 um:x41 minimum:6000 name:LLC_MISSES : Last level cache demand requests from this core that missed the LLC
9 event:0x2e counters:0,1 um:x4f minimum:6000 name:LLC_REFS : Last level cache demand requests from this core
10 event:0xc4 counters:0,1 um:br_inst_retired minimum:500 name:BR_INST_RETIRED : number of branch instructions retired
11 event:0xc5 counters:0,1 um:zero minimum:500 name:BR_MISS_PRED_RETIRED : number of mispredicted branches retired (precise)
13 event:0x02 counters:0,1 um:store_forwards minimum:6000 name:STORE_FORWARDS : Good store forwards
14 event:0x06 counters:0,1 um:segment_reg_loads minimum:6000 name:SEGMENT_REG_LOADS : Number of segment register loads
15 event:0x07 counters:0,1 um:simd_prefetch minimum:6000 name:PREFETCH : Streaming SIMD Extensions (SSE) Prefetch instructions execute
[all...] |
| /external/oprofile/events/i386/core/ |
| events | 5 event:0x3c counters:0,1 um:nonhlt minimum:6000 name:CPU_CLK_UNHALTED : Unhalted clock cycles
6 event:0xc0 counters:0,1 um:zero minimum:6000 name:INST_RETIRED : number of instructions retired
7 event:0x2e counters:0,1 um:mesi minimum:6000 name:L2_RQSTS : number of L2 requests
11 event:0x03 counters:0,1 um:zero minimum:500 name:LD_BLOCKS : number of store buffer blocks
12 event:0x04 counters:0,1 um:zero minimum:500 name:SB_DRAINS : number of store buffer drain cycles
13 event:0x05 counters:0,1 um:zero minimum:500 name:MISALIGN_MEM_REF : number of misaligned data memory references
14 event:0x06 counters:0,1 um:zero minimum:500 name:SEGMENT_REG_LOADS : number of segment register loads
15 event:0x07 counters:0,1 um:kni_prefetch minimum:500 name:EMON_KNI_PREF_DISPATCHED : number of SSE pre-fetch/weakly ordered insns retired
16 event:0x10 counters:0 um:zero minimum:3000 name:FLOPS : number of computational FP operations executed
17 event:0x11 counters:1 um:zero minimum:500 name:FP_ASSIST : number of FP exceptions handled by microcod
[all...] |
| /external/oprofile/events/mips/25K/ |
| events | 6 event:0x0 counters:0,1 um:zero minimum:500 name:CYCLES : CPU cycles
7 event:0x1 counters:0,1 um:zero minimum:500 name:INSN_ISSUED : Dispatched/issued instructions
8 event:0x2 counters:0,1 um:zero minimum:500 name:FP_INSNS_ISSUED : FPU instructions issued
9 event:0x3 counters:0,1 um:zero minimum:500 name:INT_INSNS_ISSUED : Integer instructions issued
10 event:0x4 counters:0,1 um:zero minimum:500 name:LOAD_INSNS_ISSUED : Load instructions issued
11 event:0x5 counters:0,1 um:zero minimum:500 name:STORE_INSNS_ISSUED : Store instructions issued
12 event:0x6 counters:0,1 um:zero minimum:500 name:BRANCHES_JUMPS_ISSUED : Branch/Jump instructions issued
13 event:0x7 counters:0,1 um:zero minimum:500 name:DUAL_ISSUED_PAIRS : Dual-issued pairs
14 event:0x8 counters:0,1 um:zero minimum:500 name:INSNS_COMPLETE : Instruction that completed execution (with or without exception)
15 event:0x9 counters:0,1 um:zero minimum:500 name:FETCH_GROUPS_IN_PIPE : Fetch groups entering CPU execution pipe
[all...] |
| /external/oprofile/events/ppc64/970MP/ |
| events | 19 event:0X001 counters:1 um:zero minimum:10000 name:CYCLES : Processor Cycles
23 event:0X0010 counters:0 um:zero minimum:10000 name:PM_RUN_CYC_GRP1 : (Group 1 pm_slice0) Run cycles
24 event:0X0011 counters:1 um:zero minimum:10000 name:PM_CYC_GRP1 : (Group 1 pm_slice0) Processor cycles
25 event:0X0012 counters:2 um:zero minimum:1000 name:PM_STOP_COMPLETION_GRP1 : (Group 1 pm_slice0) Completion stopped
26 event:0X0013 counters:3 um:zero minimum:10000 name:PM_INST_CMPL_GRP1 : (Group 1 pm_slice0) Instructions completed
27 event:0X0014 counters:4 um:zero minimum:1000 name:PM_1PLUS_PPC_CMPL_GRP1 : (Group 1 pm_slice0) One or more PPC instruction completed
28 event:0X0015 counters:5 um:zero minimum:10000 name:PM_CYC_GRP1 : (Group 1 pm_slice0) Processor cycles
29 event:0X0016 counters:6 um:zero minimum:1000 name:PM_GRP_CMPL_GRP1 : (Group 1 pm_slice0) Group completed
30 event:0X0017 counters:7 um:zero minimum:1000 name:PM_GRP_DISP_REJECT_GRP1 : (Group 1 pm_slice0) Group dispatch rejected
33 event:0X0020 counters:0 um:zero minimum:10000 name:PM_CYC_GRP2 : (Group 2 pm_eprof) Processor cycle
[all...] |
| /external/oprofile/events/avr32/ |
| events | 3 event:0x00 counters:1,2 um:zero minimum:500 name:IFU_IFETCH_MISS : number of instruction fetch misses
4 event:0x01 counters:1,2 um:zero minimum:500 name:CYCLES_IFU_MEM_STALL : cycles instruction fetch pipe is stalled
5 event:0x02 counters:1,2 um:zero minimum:500 name:CYCLES_DATA_STALL : cycles stall due to data dependency
6 event:0x03 counters:1,2 um:zero minimum:500 name:ITLB_MISS : number of Instruction TLB misses
7 event:0x04 counters:1,2 um:zero minimum:500 name:DTLB_MISS : number of Data TLB misses
8 event:0x05 counters:1,2 um:zero minimum:500 name:BR_INST_EXECUTED : branch instruction executed w/ or w/o program flow change
9 event:0x06 counters:1,2 um:zero minimum:500 name:BR_INST_MISS_PRED : branch mispredicted
10 event:0x07 counters:1,2 um:zero minimum:500 name:INSN_EXECUTED : instructions executed
11 event:0x08 counters:1,2 um:zero minimum:500 name:DCACHE_WBUF_FULL : data cache write buffers full
12 event:0x09 counters:1,2 um:zero minimum:500 name:CYCLES_DCACHE_WBUF_FULL : cycles stalled due to data cache write buffers ful
[all...] |
