| /external/llvm/test/CodeGen/Thumb2/ |
| thumb2-mvn2.ll | 5 ; CHECK: mvns r0, r0
12 ; CHECK: mvns r0, r0
|
| /external/llvm/test/MC/ARM/ |
| arm_instructions.s | 61 @ CHECK: mvns r1, r2 @ encoding: [0x02,0x10,0xf0,0xe1]
62 mvns r1,r2
|
| basic-thumb-instructions.s | 412 mvns r6, r3
414 @ CHECK: mvns r6, r3 @ encoding: [0xde,0x43]
|
| basic-arm-instructions.s | [all...] |
| basic-thumb2-instructions.s | [all...] |
| /external/v8/test/cctest/ |
| test-disasm-arm.cc | 247 "e1f00003 mvns r0, r3");
256 "e3f04001 mvns r4, #1");
|
| /external/valgrind/main/none/tests/arm/ |
| v6intThumb.stdout.exp | 114 MVNS-16 0x10F
115 mvns r0, r1 :: rd 0xfffffffe rm 0x00000001, c:v-in 0, cpsr 0x80000000 N
116 mvns r0, r1 :: rd 0xfffffffe rm 0x00000001, c:v-in 0, cpsr 0x80000000 N
117 mvns r0, r1 :: rd 0xffffffff rm 0x00000000, c:v-in 0, cpsr 0x80000000 N
118 mvns r0, r1 :: rd 0x7fffffff rm 0x80000000, c:v-in 0, cpsr 0x00000000
119 mvns r0, r1 :: rd 0x7ffffffe rm 0x80000001, c:v-in 0, cpsr 0x00000000
120 mvns r0, r1 :: rd 0x00000000 rm 0xffffffff, c:v-in 0, cpsr 0x40000000 Z
121 mvns r0, r1 :: rd 0x80000000 rm 0x7fffffff, c:v-in 0, cpsr 0x80000000 N
122 mvns r0, r1 :: rd 0xfffffffe rm 0x00000001, c:v-in 1, cpsr 0x90000000 N V
123 mvns r0, r1 :: rd 0xffffffff rm 0x00000000, c:v-in 1, cpsr 0x90000000 N
[all...] |
| v6intARM.stdout.exp | 18 mvns r0, r1 :: rd 0xfffffffe rm 0x00000001, carryin 0, cpsr 0x80000000 N
19 mvns r0, r1 :: rd 0xffffffff rm 0x00000000, carryin 0, cpsr 0x80000000 N
20 mvns r0, r1 :: rd 0x7fffffff rm 0x80000000, carryin 0, cpsr 0x00000000
21 mvns r0, r1 :: rd 0xfffffffe rm 0x00000001, carryin 1, cpsr 0xa0000000 N C
22 mvns r0, r1 :: rd 0xffffffff rm 0x00000000, carryin 1, cpsr 0xa0000000 N C
23 mvns r0, r1 :: rd 0x7fffffff rm 0x80000000, carryin 1, cpsr 0x20000000 C
[all...] |
| v6intARM.c | 159 TESTINST2("mvns r0, r1", 1, r0, r1, c);
160 TESTINST2("mvns r0, r1", 0, r0, r1, c);
161 TESTINST2("mvns r0, r1", 0x80000000, r0, r1, c);
[all...] |
| v6intThumb.c | 250 TESTINST2("mvns r0, r1", 1, r0, r1, cv);
251 TESTINST2("mvns r0, r1", 0, r0, r1, cv);
252 TESTINST2("mvns r0, r1", 0x80000000, r0, r1, cv);
[all...] |
| /external/chromium_org/v8/test/cctest/ |
| test-disasm-arm.cc | 243 "e1f00003 mvns r0, r3");
252 "e3f04001 mvns r4, #1");
[all...] |
| /art/compiler/utils/arm/ |
| assembler_arm.h | 256 void mvns(Register rd, ShifterOperand so, Condition cond = AL);
|
| assembler_arm.cc | 380 void ArmAssembler::mvns(Register rd, ShifterOperand so, Condition cond) { function in class:art::arm::ArmAssembler
[all...] |
| /art/compiler/dex/quick/arm/ |
| assemble_arm.cc | 309 "mvns", "!0C, !1C", 2),
[all...] |
| /external/llvm/test/MC/Disassembler/ARM/ |
| thumb1.txt | 306 # CHECK: mvns r6, r3
|
| basic-arm-instructions.txt | 880 # CHECK: mvns r3, #7
896 # CHECK: mvns r2, r3
920 # CHECK: mvns r5, r6, lsr r7
[all...] |
| thumb2.txt | 1168 # CHECK: mvns r8, #21
1170 # CHECK: mvns r0, #66846720
1189 # CHECK: mvns r2, r3
[all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| Assemble.cpp | 310 "mvns", "r!0d, r!1d", 1),
[all...] |
