| /system/core/libcorkscrew/arch-arm/ |
| backtrace-arm.c | 84 static const int R_SP = 13;
245 uint32_t sp = state->gregs[R_SP];
253 if (i == R_SP) {
261 set_reg(state, R_SP, sp);
307 set_reg(state, R_SP, state->gregs[R_SP] + ((op & 0x3f) << 2) + 4);
310 set_reg(state, R_SP, state->gregs[R_SP] - ((op & 0x3f) << 2) - 4);
332 set_reg(state, R_SP, state->gregs[op & 0x0f]);
379 set_reg(state, R_SP, state->gregs[R_SP] + (value << 2) + 0x204)
[all...] |
| /external/valgrind/main/coregrind/ |
| m_libcassert.c | 62 (srP)->r_sp = (ULong)esp; \
77 (srP)->r_sp = rsp; \
96 (srP)->r_sp = (ULong)r1; \
115 (srP)->r_sp = r1; \
133 (srP)->r_sp = block[1]; \
151 (srP)->r_sp = sp; \
175 (srP)->r_sp = (ULong)sp; \
|
| m_stacktrace.c | 85 uregs.xsp = (Addr)startRegs->r_sp;
241 uregs.xsp = startRegs->r_sp;
412 Addr sp = (Addr)startRegs->r_sp;
676 uregs.r13 = startRegs->r_sp;
811 uregs.sp = startRegs->r_sp;
893 uregs.sp = startRegs->r_sp;
[all...] |
| pub_core_basics.h | 89 ULong r_sp; /* x86:ESP, amd64:RSP, ppc:R1, arm:R13, mips:sp */ member in struct:__anon27976
|
| m_machine.c | 70 regs->r_sp = (ULong)VG_(threads)[tid].arch.vex.guest_ESP;
75 regs->r_sp = VG_(threads)[tid].arch.vex.guest_RSP;
80 regs->r_sp = (ULong)VG_(threads)[tid].arch.vex.guest_GPR1;
85 regs->r_sp = VG_(threads)[tid].arch.vex.guest_GPR1;
90 regs->r_sp = (ULong)VG_(threads)[tid].arch.vex.guest_R13;
101 regs->r_sp = (ULong)VG_(threads)[tid].arch.vex.guest_SP;
108 regs->r_sp = VG_(threads)[tid].arch.vex.guest_r29;
[all...] |
| m_signals.c | 276 (srP)->r_sp = (ULong)((uc)->uc_mcontext.esp); \
288 (srP)->r_sp = (uc)->uc_mcontext.rsp; \
347 (srP)->r_sp = (ULong)((uc)->uc_regs->mc_gregs[VKI_PT_R1]); \
370 (srP)->r_sp = (uc)->uc_mcontext.gp_regs[VKI_PT_R1]; \
382 (srP)->r_sp = (uc)->uc_mcontext.arm_sp; \
443 srP->r_sp = (ULong)(ss->__esp);
499 srP->r_sp = (ULong)(ss->__rsp);
514 (srP)->r_sp = (ULong)((uc)->uc_mcontext.regs.gprs[15]); \
532 (srP)->r_sp = (uc)->uc_mcontext.sc_regs[29]; \
[all...] |
| /system/core/libpixelflinger/codeflinger/ |
| MIPSAssembler.cpp | 166 mMips->ADDIU(R_sp, R_sp, -(5 * 4));
167 mMips->SW(R_s0, R_sp, 0);
168 mMips->SW(R_s1, R_sp, 4);
169 mMips->SW(R_s2, R_sp, 8);
170 mMips->SW(R_s3, R_sp, 12);
171 mMips->SW(R_s4, R_sp, 16);
179 mMips->LW(R_s0, R_sp, 0);
180 mMips->LW(R_s1, R_sp, 4);
181 mMips->LW(R_s2, R_sp, 8)
[all...] |
| MIPSAssembler.h | 542 R_t8, R_t9, R_k0, R_k1, R_gp, R_sp, R_s8, R_ra,
|
| /art/compiler/dex/quick/mips/ |
| README.mips | 37 subject to scheduling: r_K0, r_K1, r_SP, r_ZERO, r_S1 (rSELF).
|
| target_mips.cc | 29 r_T9, r_K0, r_K1, r_GP, r_SP, r_FP, r_RA};
30 static int ReservedRegs[] = {r_ZERO, r_AT, r_S0, r_S1, r_K0, r_K1, r_GP, r_SP,
|
| mips_lir.h | 200 r_SP = 29,
267 #define rMIPS_SP r_SP
|
| /dalvik/vm/compiler/template/mips/ |
| TEMPLATE_RESTORE_STATE.S | 49 lw sp, r_SP*4(a0) # restore sp
|
| TEMPLATE_SAVE_STATE.S | 61 sw sp, r_SP*4(a0) # save sp (need to adjust??? )
|
| header.S | 75 #define r_SP 29
|
| /dalvik/vm/compiler/codegen/mips/ |
| CodegenDriver.cpp | 93 newLIR3(cUnit, kMipsLw, r_GP, STACK_OFFSET_GP, r_SP);
170 newLIR3(cUnit, kMipsLw, r_GP, STACK_OFFSET_GP, r_SP);
226 newLIR3(cUnit, kMipsLw, r_GP, STACK_OFFSET_GP, r_SP);
659 newLIR3(cUnit, kMipsLw, r_GP, STACK_OFFSET_GP, r_SP);
817 newLIR3(cUnit, kMipsLw, r_GP, STACK_OFFSET_GP, r_SP);
[all...] |
| MipsLIR.h | 273 r_SP = 29,
|
| /dalvik/vm/compiler/template/out/ |
| CompilerTemplateAsm-mips.S | 82 #define r_SP 29
[all...] |
