/external/clang/test/CodeGen/ |
BasicInstrs.c | 23 _Bool setgt(int X, int Y) { function
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/external/llvm/lib/Target/Hexagon/ |
HexagonSelectCCInfo.td | 25 IntRegs:$fval, SETGT)), 100 // setgt-64. 102 DoubleRegs:$fval, SETGT)), 111 // setlt-64 -> setgt-64.
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HexagonInstrInfoV3.td | 72 (i64 (select (i1 (setgt (i64 DoubleRegs:$src2), 97 //def : Pat <(brcond (i1 (setgt (i32 IntRegs:$src1), -1)), bb:$offset),
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/external/llvm/test/CodeGen/R600/ |
sdiv.ll | 8 ; selectcc Remainder -1, 0, -1, SETGT
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unsupported-cc.ll | 28 ; CHECK: SETGT * T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z 39 ; CHECK: SETGT * T{{[0-9]+\.[XYZW]}}, literal.x, KC0[2].Z
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/ |
AMDGPUInstructions.td | 53 case ISD::SETGT: return true;}}}]
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/external/llvm/utils/emacs/ |
llvm-mode.el | 36 "setne" "seteq" "setlt" "setgt" "setle" "setge") 'words) . font-lock-keyword-face)
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/external/mesa3d/src/gallium/drivers/radeon/ |
AMDGPUInstructions.td | 53 case ISD::SETGT: return true;}}}]
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/external/llvm/test/CodeGen/Mips/ |
cmov.ll | 65 ; (select (setgt a, N), t, f)
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/external/llvm/lib/Target/Mips/ |
Mips16InstrInfo.td | [all...] |
MipsCondMov.td | 71 def : MipsPat<(select (i32 (setgt CRC:$lhs, immSExt16Plus1:$rhs)),
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Mips64InstrInfo.td | 181 def BGTZ64 : CBranchZero<"bgtz", setgt, GPR64Opnd>, BGEZ_FM<7, 0>; 306 def : MipsPat<(brcond (i32 (setgt i64:$lhs, -1)), bb:$dst),
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MipsInstrInfo.td | [all...] |
MipsDSPInstrInfo.td | [all...] |
/external/llvm/lib/Target/PowerPC/ |
PPCISelDAGToDAG.cpp | 586 case ISD::SETGT: return PPC::PRED_GT; 607 case ISD::SETGT: return 1; // Bit #1 = SETOGT 649 case ISD::SETGT: 743 case ISD::SETGT: { 780 case ISD::SETGT: { 816 case ISD::SETGT: [all...] |
/external/llvm/lib/CodeGen/ |
Analysis.cpp | 178 case ISD::SETOGT: case ISD::SETUGT: return ISD::SETGT; 197 case ICmpInst::ICMP_SGT: return ISD::SETGT;
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TargetLoweringBase.cpp | 608 CCs[RTLIB::OGT_F32] = ISD::SETGT; 609 CCs[RTLIB::OGT_F64] = ISD::SETGT; 610 CCs[RTLIB::OGT_F128] = ISD::SETGT; [all...] |
/external/llvm/lib/CodeGen/SelectionDAG/ |
SelectionDAGDumper.cpp | 302 case ISD::SETGT: return "setgt";
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TargetLowering.cpp | 137 case ISD::SETGT: [all...] |
/external/llvm/lib/Target/XCore/ |
XCoreInstrInfo.td | [all...] |
/external/llvm/lib/Target/AArch64/ |
AArch64ISelLowering.cpp | [all...] |
/external/llvm/include/llvm/CodeGen/ |
ISDOpcodes.h | 704 /// floating point. For integer, only the SETEQ,SETNE,SETLT,SETLE,SETGT, [all...] |
/external/clang/www/demo/ |
index.cgi | 99 $input =~ s@\b(add|sub|mul|div|rem|and|or|xor|setne|seteq|setlt|setgt|setle|setge|phi|tail|call|cast|to|shl|shr|vaarg|vanext|ret|br|switch|invoke|unwind|malloc|alloca|free|load|store|getelementptr|begin|end|true|false|declare|global|constant|const|internal|uninitialized|external|implementation|linkonce|weak|appending|null|to|except|not|target|endian|pointersize|big|little|volatile)\b@<span class="llvm_keyword">$1</span>@g;
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/external/llvm/lib/Target/R600/ |
AMDGPUInstructions.td | 56 case ISD::SETGT: return true;}}}]
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/external/llvm/include/llvm/Target/ |
TargetSelectionDAG.td | 502 def SETEQ : CondCode; def SETGT : CondCode; def SETGE : CondCode; [all...] |