| /external/llvm/lib/Transforms/InstCombine/ |
| InstCombineShifts.cpp | 524 BinaryOperator *ShiftOp = dyn_cast<BinaryOperator>(Op0);
525 if (ShiftOp && !ShiftOp->isShift())
526 ShiftOp = 0;
528 if (ShiftOp && isa<ConstantInt>(ShiftOp->getOperand(1))) {
542 ConstantInt *ShiftAmt1C = cast<ConstantInt>(ShiftOp->getOperand(1));
547 Value *X = ShiftOp->getOperand(0);
552 if (I.getOpcode() == ShiftOp->getOpcode()) {
569 ShiftOp->getOpcode() == Instruction::Shl)
[all...] |
| /external/qemu/target-arm/ |
| neon_helper.c | 469 uint64_t HELPER(neon_shl_u64)(uint64_t val, uint64_t shiftop)
471 int8_t shift = (int8_t)shiftop;
499 uint64_t HELPER(neon_shl_s64)(uint64_t valop, uint64_t shiftop)
501 int8_t shift = (int8_t)shiftop;
532 uint32_t HELPER(neon_rshl_s32)(uint32_t valop, uint32_t shiftop)
536 int8_t shift = (int8_t)shiftop;
550 uint64_t HELPER(neon_rshl_s64)(uint64_t valop, uint64_t shiftop)
552 int8_t shift = (int8_t)shiftop;
592 uint32_t HELPER(neon_rshl_u32)(uint32_t val, uint32_t shiftop)
595 int8_t shift = (int8_t)shiftop;
[all...] |
| translate.c | 445 static inline void gen_arm_shift_im(TCGv var, int shiftop, int shift, int flags)
447 switch (shiftop) {
494 static inline void gen_arm_shift_reg(TCGv var, int shiftop,
498 switch (shiftop) {
505 switch (shiftop) {
855 int val, rm, shift, shiftop; local
869 shiftop = (insn >> 5) & 3;
871 gen_arm_shift_im(offset, shiftop, shift, 0);
6850 int set_cc, logic_cc, shiftop; local
7789 int shiftop; local
[all...] |
| /external/chromium_org/v8/src/arm/ |
| constants-arm.h | 251 enum ShiftOp {
258 // Use a special code to make the distinction. The RRX ShiftOp is only used
639 inline int ShiftValue() const { return static_cast<ShiftOp>(Bits(6, 5)); }
640 inline ShiftOp ShiftField() const {
641 return static_cast<ShiftOp>(BitField(6, 5));
|
| assembler-arm.h | 565 explicit Operand(Register rm, ShiftOp shift_op, int shift_imm);
579 explicit Operand(Register rm, ShiftOp shift_op, Register rs);
599 ShiftOp shift_op() const { return shift_op_; }
604 ShiftOp shift_op_;
632 ShiftOp shift_op, int shift_imm, AddrMode am = Offset);
662 ShiftOp shift_op_;
[all...] |
| assembler-arm.cc | 345 Operand::Operand(Register rm, ShiftOp shift_op, int shift_imm) {
361 Operand::Operand(Register rm, ShiftOp shift_op, Register rs) {
388 ShiftOp shift_op, int shift_imm, AddrMode am) {
[all...] |
| disasm-arm.cc | 214 ShiftOp shift = instr->ShiftField();
[all...] |
| simulator-arm.cc | [all...] |
| /external/v8/src/arm/ |
| constants-arm.h | 286 enum ShiftOp {
293 // Use a special code to make the distinction. The RRX ShiftOp is only used
643 inline int ShiftValue() const { return static_cast<ShiftOp>(Bits(6, 5)); }
644 inline ShiftOp ShiftField() const {
645 return static_cast<ShiftOp>(BitField(6, 5));
|
| assembler-arm.h | 414 explicit Operand(Register rm, ShiftOp shift_op, int shift_imm);
417 explicit Operand(Register rm, ShiftOp shift_op, Register rs);
437 ShiftOp shift_op() const { return shift_op_; }
442 ShiftOp shift_op_;
470 ShiftOp shift_op, int shift_imm, AddrMode am = Offset);
494 ShiftOp shift_op_;
[all...] |
| assembler-arm.cc | 183 Operand::Operand(Register rm, ShiftOp shift_op, int shift_imm) {
199 Operand::Operand(Register rm, ShiftOp shift_op, Register rs) {
225 ShiftOp shift_op, int shift_imm, AddrMode am) {
[all...] |
| disasm-arm.cc | 211 ShiftOp shift = instr->ShiftField();
[all...] |
| simulator-arm.cc | [all...] |
| /dalvik/vm/compiler/codegen/arm/ |
| CodegenDriver.cpp | 785 bool shiftOp = false;
837 shiftOp = true;
842 shiftOp = true;
847 shiftOp = true;
863 if (shiftOp) {
[all...] |
| /dalvik/vm/compiler/codegen/mips/ |
| CodegenDriver.cpp | 836 bool shiftOp = false;
890 shiftOp = true;
895 shiftOp = true;
900 shiftOp = true;
924 if (shiftOp) {
[all...] |
| /external/llvm/lib/Target/ARM/InstPrinter/ |
| ARMInstPrinter.cpp | 690 unsigned ShiftOp = MI->getOperand(OpNum).getImm();
691 bool isASR = (ShiftOp & (1 << 5)) != 0;
692 unsigned Amt = ShiftOp & 0x1f;
[all...] |
| /external/doclava/src/com/google/doclava/parser/ |
| Java.g | 1034 (shiftOp additiveExpression
1039 shiftOp
[all...] |
| JavaParser.java | 374 "synpred229_Java", "synpred170_Java", "shiftOp", "synpred134_Java",
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| LegalizeIntegerTypes.cpp | [all...] |
| SelectionDAGBuilder.cpp | [all...] |
| /external/llvm/lib/Target/ARM/ |
| ARMCodeEmitter.cpp | [all...] |
| /external/llvm/lib/Target/AArch64/ |
| AArch64InstrInfo.td | [all...] |
