| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
| r200_blit.c | 359 struct radeon_bo *src_bo,
367 src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
443 * @param[in] src_bo source radeon buffer object
444 * @param[in] src_offset offset of the source image in the @a src_bo
464 struct radeon_bo *src_bo,
506 if (src_bo == dst_bo) {
520 src_bo);
532 if (!validate_buffers(r200, src_bo, dst_bo))
538 emit_tx_setup(r200, src_mesaformat, dst_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch);
|
| r200_blit.h | 36 struct radeon_bo *src_bo,
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/ |
| radeon_blit.c | 234 struct radeon_bo *src_bo,
242 src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
321 * @param[in] src_bo source radeon buffer object
322 * @param[in] src_offset offset of the source image in the @a src_bo
342 struct radeon_bo *src_bo,
384 if (src_bo == dst_bo) {
398 src_bo);
410 if (!validate_buffers(r100, src_bo, dst_bo))
416 emit_tx_setup(r100, src_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch);
|
| radeon_blit.h | 36 struct radeon_bo *src_bo,
|
| radeon_mipmap_tree.c | 588 struct radeon_bo *src_bo = (img->mt) ? img->mt->bo : img->bo; local
589 if (src_bo && radeon_bo_is_referenced_by_cs(src_bo, rmesa->cmdbuf.cs)) {
|
| radeon_common_context.h | 479 struct radeon_bo *src_bo,
|
| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| r200_blit.c | 359 struct radeon_bo *src_bo,
367 src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
443 * @param[in] src_bo source radeon buffer object
444 * @param[in] src_offset offset of the source image in the @a src_bo
464 struct radeon_bo *src_bo,
506 if (src_bo == dst_bo) {
520 src_bo);
532 if (!validate_buffers(r200, src_bo, dst_bo))
538 emit_tx_setup(r200, src_mesaformat, dst_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch);
|
| r200_blit.h | 36 struct radeon_bo *src_bo,
|
| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| radeon_blit.c | 234 struct radeon_bo *src_bo,
242 src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0);
321 * @param[in] src_bo source radeon buffer object
322 * @param[in] src_offset offset of the source image in the @a src_bo
342 struct radeon_bo *src_bo,
384 if (src_bo == dst_bo) {
398 src_bo);
410 if (!validate_buffers(r100, src_bo, dst_bo))
416 emit_tx_setup(r100, src_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch);
|
| radeon_blit.h | 36 struct radeon_bo *src_bo,
|
| radeon_mipmap_tree.c | 588 struct radeon_bo *src_bo = (img->mt) ? img->mt->bo : img->bo; local
589 if (src_bo && radeon_bo_is_referenced_by_cs(src_bo, rmesa->cmdbuf.cs)) {
|
| radeon_common_context.h | 479 struct radeon_bo *src_bo,
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/intel/ |
| intel_blit.h | 69 drm_intel_bo *src_bo,
|
| intel_blit.c | 484 drm_intel_bo *src_bo,
498 pitch, src_bo, src_offset, I915_TILING_NONE,
513 pitch, src_bo, src_offset, I915_TILING_NONE,
|
| intel_buffer_objects.c | 645 drm_intel_bo *src_bo, *dst_bo; local
683 src_bo = intel_bufferobj_source(intel, intel_src, 64, &src_offset);
687 src_bo, read_offset + src_offset, size);
|
| /external/mesa3d/src/mesa/drivers/dri/intel/ |
| intel_blit.h | 69 drm_intel_bo *src_bo,
|
| intel_blit.c | 484 drm_intel_bo *src_bo,
498 pitch, src_bo, src_offset, I915_TILING_NONE,
513 pitch, src_bo, src_offset, I915_TILING_NONE,
|
| intel_buffer_objects.c | 645 drm_intel_bo *src_bo, *dst_bo; local
683 src_bo = intel_bufferobj_source(intel, intel_src, 64, &src_offset);
687 src_bo, read_offset + src_offset, size);
|
