| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_eu.h | 78 GLuint subnr:5; /* :1 in align16 */ member in struct:brw_reg
178 * \param subnr register sub number
188 GLuint subnr,
207 reg.subnr = subnr * type_sz(type);
217 * set swizzle and writemask to W, as the lower bits of subnr will
232 GLuint subnr )
236 subnr,
248 GLuint subnr )
252 subnr,
[all...] |
| brw_eu_debug.c | 63 hwreg.subnr == 0 &&
77 printf("scl%d.%d", hwreg.nr, hwreg.subnr / 4);
86 hwreg.subnr / type_sz(hwreg.type),
|
| brw_wm_debug.c | 75 if ((hw_reg.nr&1) || hw_reg.subnr) {
76 printf("->%d.%d", (hw_reg.nr&1), hw_reg.subnr);
|
| brw_eu_emit.c | 121 insn->bits1.da1.dest_subreg_nr = dest.subnr;
127 insn->bits1.da16.dest_subreg_nr = dest.subnr / 16;
134 insn->bits1.ia1.dest_subreg_nr = dest.subnr;
264 insn->bits2.da1.src0_subreg_nr = reg.subnr;
268 insn->bits2.da16.src0_subreg_nr = reg.subnr / 16;
273 insn->bits2.ia1.src0_subreg_nr = reg.subnr;
346 insn->bits3.da1.src1_subreg_nr = reg.subnr;
350 insn->bits3.da16.src1_subreg_nr = reg.subnr / 16;
758 return reg.subnr / 4 + BRW_GET_SWZ(reg.dw1.bits.swizzle, 0);
760 return reg.subnr / 4
[all...] |
| brw_vs_emit.c | 1079 const_reg.subnr = 0;
[all...] |
| brw_gs_emit.c | 448 vertex_slot.subnr = (slot % 2) * 16;
|
| brw_structs.h | 989 GLuint dest_subreg_nr:3; /* subnr for the address reg a0.x */
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_eu.h | 78 GLuint subnr:5; /* :1 in align16 */ member in struct:brw_reg
178 * \param subnr register sub number
188 GLuint subnr,
207 reg.subnr = subnr * type_sz(type);
217 * set swizzle and writemask to W, as the lower bits of subnr will
232 GLuint subnr )
236 subnr,
248 GLuint subnr )
252 subnr,
[all...] |
| brw_eu_debug.c | 63 hwreg.subnr == 0 &&
77 printf("scl%d.%d", hwreg.nr, hwreg.subnr / 4);
86 hwreg.subnr / type_sz(hwreg.type),
|
| brw_wm_debug.c | 75 if ((hw_reg.nr&1) || hw_reg.subnr) {
76 printf("->%d.%d", (hw_reg.nr&1), hw_reg.subnr);
|
| brw_eu_emit.c | 121 insn->bits1.da1.dest_subreg_nr = dest.subnr;
127 insn->bits1.da16.dest_subreg_nr = dest.subnr / 16;
134 insn->bits1.ia1.dest_subreg_nr = dest.subnr;
264 insn->bits2.da1.src0_subreg_nr = reg.subnr;
268 insn->bits2.da16.src0_subreg_nr = reg.subnr / 16;
273 insn->bits2.ia1.src0_subreg_nr = reg.subnr;
346 insn->bits3.da1.src1_subreg_nr = reg.subnr;
350 insn->bits3.da16.src1_subreg_nr = reg.subnr / 16;
758 return reg.subnr / 4 + BRW_GET_SWZ(reg.dw1.bits.swizzle, 0);
760 return reg.subnr / 4
[all...] |
| brw_vs_emit.c | 1079 const_reg.subnr = 0;
[all...] |
| brw_gs_emit.c | 448 vertex_slot.subnr = (slot % 2) * 16;
|
| brw_structs.h | 989 GLuint dest_subreg_nr:3; /* subnr for the address reg a0.x */
[all...] |
| /frameworks/av/media/libstagefright/codecs/amrnb/enc/src/ |
| c2_9pf.cpp | 121 Word16 subNr, /* i : subframe number */
129 Word16 subNr, /* i : subframe number */
168 subNr = subframe number (Word16)
240 Word16 subNr, // i : subframe number
264 search_2i40(subNr, dn, rr, codvec);
265 index = build_code(subNr, codvec, dn_sign, code, h, y, sign);
303 Word16 subNr, /* i : subframe number */
381 subNr,
389 subNr,
434 subNr = subframe number (Word16
[all...] |
| cbsearch.cpp | 64 subNr -- Word16 -- subframe number
197 Word16 subNr, /* i : subframe number */
214 subNr,
|
| c2_9pf.h | 103 Word16 subNr, /* i : subframe number */
|
| cbsearch.h | 122 Word16 subNr, /* i : subframe number */
|
| /frameworks/av/media/libstagefright/codecs/amrnb/dec/src/ |
| d2_9pf.cpp | 176 Word16 subNr, /* i : subframe number */
200 subNr,
206 /* pos0 =i*5+startPos[j*8+subNr*2] */
214 /* pos1 =i*5+startPos[j*8+subNr*2 + 1] */
|
| d2_9pf.h | 107 Word16 subNr, /* i : subframe number */
|
| /external/clang/lib/Sema/ |
| SemaExceptionSpec.cpp | 576 FunctionProtoType::NoexceptResult SubNR = Subset->getNoexceptSpec(Context);
577 if (SubNR == FunctionProtoType::NR_BadNoexcept ||
578 SubNR == FunctionProtoType::NR_Dependent)
582 if (SubNR == FunctionProtoType::NR_Throw) {
590 if (SubEST == EST_DynamicNone || SubNR == FunctionProtoType::NR_Nothrow)
[all...] |
