| /external/llvm/test/CodeGen/Mips/ |
| mno-ldc1-sdc1.ll | 30 ; LE-PIC: swc1 $f12, 0(${{[0-9]+}})
31 ; LE-PIC: swc1 $f13, 4(${{[0-9]+}})
33 ; LE-STATIC: swc1 $f12, %lo(g0)(${{[0-9]+}})
34 ; LE-STATIC: swc1 $f13, %lo(g0+4)(${{[0-9]+}})
36 ; BE-PIC: swc1 $f13, 0(${{[0-9]+}})
37 ; BE-PIC: swc1 $f12, 4(${{[0-9]+}})
|
| sint-fp-store_pattern.ll | 9 ; 32: swc1 $f[[R0]],
20 ; 32: swc1 $f[[R0]],
23 ; 64: swc1 $f[[R0]],
|
| fastcc.ll | 209 ; CHECK: swc1 $f0
210 ; CHECK: swc1 $f1
211 ; CHECK: swc1 $f2
212 ; CHECK: swc1 $f3
213 ; CHECK: swc1 $f4
214 ; CHECK: swc1 $f5
215 ; CHECK: swc1 $f6
216 ; CHECK: swc1 $f7
217 ; CHECK: swc1 $f8
218 ; CHECK: swc1 $f
[all...] |
| mips64fpldst.ll | 37 ; CHECK-N64: swc1 $f{{[0-9]+}}, 0($[[R0]])
40 ; CHECK-N32: swc1 $f{{[0-9]+}}, 0($[[R0]])
|
| /development/ndk/sources/android/libportable/arch-mips/ |
| _setjmp.S | 49 swc1 FPR, OFF(BASE) ; \
108 swc1 $f20, JB_F20(a0)
109 swc1 $f21, JB_F21(a0)
110 swc1 $f22, JB_F22(a0)
111 swc1 $f23, JB_F23(a0)
112 swc1 $f24, JB_F24(a0)
113 swc1 $f25, JB_F25(a0)
114 swc1 $f26, JB_F26(a0)
115 swc1 $f27, JB_F27(a0)
116 swc1 $f28, JB_F28(a0
[all...] |
| setjmp.S | 49 swc1 FPR, OFF(BASE) ; \
122 swc1 $f20, JB_F20(a0)
123 swc1 $f21, JB_F21(a0)
124 swc1 $f22, JB_F22(a0)
125 swc1 $f23, JB_F23(a0)
126 swc1 $f24, JB_F24(a0)
127 swc1 $f25, JB_F25(a0)
128 swc1 $f26, JB_F26(a0)
129 swc1 $f27, JB_F27(a0)
130 swc1 $f28, JB_F28(a0
[all...] |
| /external/valgrind/main/none/tests/mips32/ |
| vfp.stdout.exp-mips32 | 72 SWC1
73 swc1 $f0, 0($t0) :: out: 0x0
74 swc1 $f0, 0($t0) :: out: 0x40400000
75 swc1 $f0, 0($t0) :: out: 0x44ad1333
76 swc1 $f0, 0($t0) :: out: 0x4e6e6b28
77 swc1 $f0, 0($t0) :: out: 0x44db0000
78 swc1 $f0, 0($t0) :: out: 0x322bcc77
79 swc1 $f0, 0($t0) :: out: 0xc732da7a
80 swc1 $f0, 0($t0) :: out: 0x42080079
81 swc1 $f0, 0($t0) :: out: 0x49d5e00
[all...] |
| vfp.stdout.exp | 153 SWC1
154 swc1 $f0, 0($t0) :: out: 0x0
155 swc1 $f0, 0($t0) :: out: 0x40400000
156 swc1 $f0, 0($t0) :: out: 0x44ad1333
157 swc1 $f0, 0($t0) :: out: 0x4e6e6b28
158 swc1 $f0, 0($t0) :: out: 0x44db0000
159 swc1 $f0, 0($t0) :: out: 0x322bcc77
160 swc1 $f0, 0($t0) :: out: 0xc732da7a
161 swc1 $f0, 0($t0) :: out: 0x42080079
162 swc1 $f0, 0($t0) :: out: 0x49d5e00
[all...] |
| vfp.stdout.exp-BE | 153 SWC1
154 swc1 $f0, 0($t0) :: out: 0x0
155 swc1 $f0, 0($t0) :: out: 0x40400000
156 swc1 $f0, 0($t0) :: out: 0x44ad1333
157 swc1 $f0, 0($t0) :: out: 0x4e6e6b28
158 swc1 $f0, 0($t0) :: out: 0x44db0000
159 swc1 $f0, 0($t0) :: out: 0x322bcc77
160 swc1 $f0, 0($t0) :: out: 0xc732da7a
161 swc1 $f0, 0($t0) :: out: 0x42080079
162 swc1 $f0, 0($t0) :: out: 0x49d5e00
[all...] |
| vfp.c | 163 // swc1 $f0, 0($t0)
171 "swc1 $f0, "#offset"($t0) \n\t" \
177 printf("swc1 $f0, 0($t0) :: out: 0x%x\n", \
383 printf("SWC1\n");
|
| /bionic/libc/arch-mips/bionic/ |
| _setjmp.S | 48 swc1 FPR, OFF(BASE) ; \
102 swc1 $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
103 swc1 $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
104 swc1 $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
105 swc1 $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
106 swc1 $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
107 swc1 $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
108 swc1 $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
109 swc1 $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
110 swc1 $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0
[all...] |
| setjmp.S | 49 swc1 FPR, OFF(BASE) ; \
115 swc1 $f20, SC_FPREGS+((F20-F0)*REGSZ_FP)(a0)
116 swc1 $f21, SC_FPREGS+((F21-F0)*REGSZ_FP)(a0)
117 swc1 $f22, SC_FPREGS+((F22-F0)*REGSZ_FP)(a0)
118 swc1 $f23, SC_FPREGS+((F23-F0)*REGSZ_FP)(a0)
119 swc1 $f24, SC_FPREGS+((F24-F0)*REGSZ_FP)(a0)
120 swc1 $f25, SC_FPREGS+((F25-F0)*REGSZ_FP)(a0)
121 swc1 $f26, SC_FPREGS+((F26-F0)*REGSZ_FP)(a0)
122 swc1 $f27, SC_FPREGS+((F27-F0)*REGSZ_FP)(a0)
123 swc1 $f28, SC_FPREGS+((F28-F0)*REGSZ_FP)(a0
[all...] |
| /external/llvm/test/MC/Mips/ |
| mips-memory-instructions.s | 12 # CHECK: swc1 $f2, 16($5) # encoding: [0x10,0x00,0xa2,0xe4]
19 swc1 $f2, 16($5)
|
| mips-fpu-instructions.s | 151 # CHECK: swc1 $f9, 9158($7) # encoding: [0xc6,0x23,0xe9,0xe4]
178 swc1 $f9,9158($a3)
|
| /external/chromium_org/v8/test/cctest/ |
| test-assembler-mips.cc | 1089 __ swc1(f10, MemOperand(a0, OFFSET_OF(T, trunc_small_out)));
1096 __ swc1(f8, MemOperand(a0, OFFSET_OF(T, trunc_big_out)));
1171 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, x##_up_out))); \
1175 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, x##_down_out))); \
1179 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, neg_##x##_up_out))); \
1183 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, neg_##x##_down_out))); \
[all...] |
| /external/v8/test/cctest/ |
| test-assembler-mips.cc | 1095 __ swc1(f10, MemOperand(a0, OFFSET_OF(T, trunc_small_out)));
1102 __ swc1(f8, MemOperand(a0, OFFSET_OF(T, trunc_big_out)));
1180 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, x##_up_out))); \
1184 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, x##_down_out))); \
1188 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, neg_##x##_up_out))); \
1192 __ swc1(f0, MemOperand(a0, OFFSET_OF(T, neg_##x##_down_out))); \
[all...] |
| /external/chromium_org/v8/src/mips/ |
| constants-mips.cc | 343 case SWC1:
|
| lithium-gap-resolver-mips.cc | 239 __ swc1(kLithiumScratchDouble, destination_operand);
|
| assembler-mips.cc | 1644 void Assembler::swc1(FPURegister fd, const MemOperand& src) { function in class:v8::Assembler
[all...] |
| /external/llvm/lib/Target/Mips/ |
| MipsInstrFPU.td | 359 def SWC1_P8 : SW_FT<"swc1", FGR32RegsOpnd, IIFStore, mem64, store>,
373 def SWC1 : SW_FT<"swc1", FGR32RegsOpnd, IIFStore, mem, store>, LW_FM<0x39>;
623 def : StoreRegImmPat<SWC1, f32>;
|
| MipsSEInstrInfo.cpp | 78 (Opc == Mips::SD_P8) || (Opc == Mips::SWC1) || (Opc == Mips::SWC1_P8) ||
201 Opc = IsN64 ? Mips::SWC1_P8 : Mips::SWC1;
279 expandDPLoadStore(MBB, MI, Mips::SDC1, Mips::SWC1);
|
| /external/v8/src/mips/ |
| constants-mips.cc | 337 case SWC1:
|
| lithium-gap-resolver-mips.cc | 240 __ swc1(kLithiumScratchDouble, destination_operand);
|
| /art/runtime/ |
| disassembler_mips.cc | 140 { kITypeMask, 57u << kOpcodeShift, "swc1", "tO", },
|
| /art/compiler/utils/mips/ |
| assembler_mips.h | 290 void Swc1(FRegister ft, Register rs, uint16_t imm16);
|
