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  /dalvik/vm/compiler/codegen/arm/
CodegenCommon.cpp 41 maskPtr = &lir->useMask;
132 lir->useMask = lir->defMask = 0;
149 lir->defMask = lir->useMask = ENCODE_ALL;
191 setupRegMask(&lir->useMask, lir->operands[i]);
197 lir->useMask |= ENCODE_REG_PC;
201 lir->useMask |= ENCODE_REG_SP;
205 lir->useMask |= ENCODE_REG_LIST(lir->operands[0]);
209 lir->useMask |= ENCODE_REG_LIST(lir->operands[1]);
213 lir->useMask |= ENCODE_CCODE;
219 if ((opcode == kThumbPush) && (lir->useMask & r8Mask))
    [all...]
LocalOptimizations.cpp 25 #define CHECK_REG_DEP(use, def, check) ((def & check->useMask) || \
112 u8 thisMemMask = (thisLIR->useMask | thisLIR->defMask) & ENCODE_MEM;
126 u8 stopUseRegMask = (ENCODE_REG_PC | thisLIR->useMask) &
140 u8 checkMemMask = (checkLIR->useMask | checkLIR->defMask) &
297 u8 stopUseAllMask = thisLIR->useMask;
431 if (((curLIR->useMask & prevLIR->defMask) &&
ArchUtility.cpp 385 if (lir->useMask && (!lir->flags.isNop || dumpNop)) {
387 lir->useMask, "use"));
ArmLIR.h     [all...]
  /dalvik/vm/compiler/codegen/mips/
CodegenCommon.cpp 43 maskPtr = &lir->useMask;
150 lir->useMask = lir->defMask = 0;
167 lir->defMask = lir->useMask = ENCODE_ALL;
209 setupRegMask(&lir->useMask, lir->operands[i]);
215 lir->useMask |= ENCODE_REG_PC;
219 lir->useMask |= ENCODE_REG_SP;
223 lir->useMask |= ENCODE_REG_LIST(lir->operands[0]);
227 lir->useMask |= ENCODE_REG_LIST(lir->operands[1]);
231 lir->useMask |= ENCODE_CCODE;
246 lir->useMask |= ENCODE_REG_PC
    [all...]
GlobalOptimizations.cpp 105 /* useMask and defMask set to ENCODE_ALL, any checking of */
136 if (thisLIR->defMask & nextLIR->useMask) {
151 if (thisLIR->useMask & nextLIR->defMask) {
163 savedLIR[i]->useMask &= ~(1 << thisLIR->operands[0]);
164 savedLIR[i]->useMask |= 1 << thisLIR->operands[1];
258 u8 useMask = branchLIR->useMask;
288 if (!(thisLIR->useMask & defMask) &&
289 !(thisLIR->defMask & useMask) &&
303 useMask |= thisLIR->useMask
    [all...]
LocalOptimizations.cpp 25 #define CHECK_REG_DEP(use, def, check) ((def & check->useMask) || \
112 u8 thisMemMask = (thisLIR->useMask | thisLIR->defMask) & ENCODE_MEM;
126 u8 stopUseRegMask = (ENCODE_REG_PC | thisLIR->useMask) &
140 u8 checkMemMask = (checkLIR->useMask | checkLIR->defMask) &
297 u8 stopUseAllMask = thisLIR->useMask;
431 if (((curLIR->useMask & prevLIR->defMask) &&
ArchUtility.cpp 307 if (lir->useMask && (!lir->flags.isNop || dumpNop)) {
309 lir->useMask, "use"));
MipsLIR.h 615 u8 useMask; // Resource mask for use
  /external/chromium_org/third_party/mesa/src/src/gallium/drivers/r300/compiler/
radeon_dataflow_swizzles.c 39 unsigned int usemask; local
41 usemask = 0;
44 usemask |= 1 << chan;
47 c->SwizzleCaps->Split(inst->U.I.SrcReg[src], usemask, &split);
86 GET_BIT(usemask, chan) ? chan : RC_SWIZZLE_UNUSED);
radeon_dataflow_deadcode.c 319 unsigned int usemask; local
341 usemask = s.Instructions[ip].WriteMask;
344 usemask |= RC_MASK_X;
346 usemask |= RC_MASK_W;
348 rc_compute_sources_for_writemask(inst, usemask, srcmasks);
r500_fragprog.c 244 static void r500_swizzle_split(struct rc_src_register src, unsigned int usemask,
252 if (swz == RC_SWIZZLE_UNUSED || !GET_BIT(usemask, i))
  /external/mesa3d/src/gallium/drivers/r300/compiler/
radeon_dataflow_swizzles.c 39 unsigned int usemask; local
41 usemask = 0;
44 usemask |= 1 << chan;
47 c->SwizzleCaps->Split(inst->U.I.SrcReg[src], usemask, &split);
86 GET_BIT(usemask, chan) ? chan : RC_SWIZZLE_UNUSED);
radeon_dataflow_deadcode.c 319 unsigned int usemask; local
341 usemask = s.Instructions[ip].WriteMask;
344 usemask |= RC_MASK_X;
346 usemask |= RC_MASK_W;
348 rc_compute_sources_for_writemask(inst, usemask, srcmasks);
r500_fragprog.c 244 static void r500_swizzle_split(struct rc_src_register src, unsigned int usemask,
252 if (swz == RC_SWIZZLE_UNUSED || !GET_BIT(usemask, i))
  /external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/
libXm.so.2 

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