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  /external/llvm/test/CodeGen/ARM/
widen-vmovs.ll 1 ; RUN: llc < %s -widen-vmovs -mcpu=cortex-a8 -verify-machineinstrs -disable-block-placement | FileCheck %s
7 ; The float loop variable is initialized with a vmovs from the constant register.
8 ; The vmovs is first widened to a vmovd, and then converted to a vorr because of the v2f32 vadd.f32.
16 ; - The VMOVS widening is happening.
neon_fpconv.ll 18 ; We used to generate vmovs between scalar and vfp/neon registers.
  /art/compiler/utils/arm/
assembler_arm.h 311 void vmovs(SRegister sd, SRegister sm, Condition cond = AL);
315 bool vmovs(SRegister sd, float s_imm, Condition cond = AL);
assembler_arm.cc 780 void ArmAssembler::vmovs(SRegister sd, SRegister sm, Condition cond) { function in class:art::arm::ArmAssembler
790 bool ArmAssembler::vmovs(SRegister sd, float s_imm, Condition cond) { function in class:art::arm::ArmAssembler
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  /external/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp 49 WidenVMOVS("widen-vmovs", cl::Hidden, cl::init(true),
50 cl::desc("Widen ARM vmovs to vmovd when possible"));
661 Opc = ARM::VMOVS;
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ARMInstrVFP.td 714 def VMOVS : ASuI<0b11101, 0b11, 0b0000, 0b01, 0,
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ARMExpandPseudoInsts.cpp     [all...]
ARMInstrFormats.td     [all...]
  /prebuilts/sdk/tools/linux/
libLLVM.so 

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