| /external/llvm/include/llvm/CodeGen/ |
| RegAllocPBQP.h | 36 /// to a register allocation solution. (i.e. The PBQP-node <--> vreg map,
49 /// and the set of allowed pregs for the vreg.
55 void recordVReg(unsigned vreg, PBQP::Graph::NodeItr node,
58 assert(vreg2Node.find(vreg) == vreg2Node.end() && "Re-mapping vreg.");
59 assert(allowedSets[vreg].empty() && "vreg already has pregs.");
61 node2VReg[node] = vreg;
62 vreg2Node[vreg] = node;
63 std::copy(arBegin, arEnd, std::back_inserter(allowedSets[vreg]));
[all...] |
| LiveIntervalUnion.h | 119 Query(LiveInterval *VReg, LiveIntervalUnion *LIU):
120 LiveUnion(LIU), VirtReg(VReg), CheckedFirstInterference(false),
135 void init(unsigned UTag, LiveInterval *VReg, LiveIntervalUnion *LIU) {
136 assert(VReg && LIU && "Invalid arguments");
137 if (UserTag == UTag && VirtReg == VReg &&
144 VirtReg = VReg;
162 bool isSeenInterference(LiveInterval *VReg) const;
167 // Did collectInterferingVRegs encounter an unspillable vreg?
|
| /external/valgrind/main/VEX/priv/ |
| host_generic_reg_alloc2.c | 107 vreg. Is safely left at False, and becomes True after a
113 Bound /* in use (holding value of some vreg) */
116 /* If .disp == Bound, what vreg is it bound to? */
117 HReg vreg; member in struct:__anon27250
123 (vreg_state) from vreg numbers back to entries in rreg_state. It
125 hregNumber(rreg_state[j].vreg) == i -- that is, the two entries
127 which involve looking for a particular vreg: there is no need to
129 vreg_state. The FAQ "does this vreg already have an associated
132 To indicate, in vreg_state[i], that a given vreg is not currently
165 finding the vreg which is mentioned as far ahead as possible, i
353 HReg rreg, vreg, vregS, vregD; local
[all...] |
| /art/runtime/ |
| stack.h | 41 // The kind of vreg being accessed in calls to Set/GetVReg.
58 // - JNI - just VRegs, but where every VReg holds a reference.
127 const uint32_t* vreg = &vregs_[i]; local
128 return *reinterpret_cast<const int32_t*>(vreg);
134 const uint32_t* vreg = &vregs_[i]; local
135 return *reinterpret_cast<const float*>(vreg);
140 const uint32_t* vreg = &vregs_[i]; local
141 return *reinterpret_cast<const int64_t*>(vreg);
146 const uint32_t* vreg = &vregs_[i]; local
147 return *reinterpret_cast<const double*>(vreg);
155 const uint32_t* vreg = &vregs_[i]; local
167 uint32_t* vreg = &vregs_[i]; local
173 uint32_t* vreg = &vregs_[i]; local
179 uint32_t* vreg = &vregs_[i]; local
185 uint32_t* vreg = &vregs_[i]; local
191 uint32_t* vreg = &vregs_[i]; local
[all...] |
| root_visitor.h | 27 typedef void (VerifyRootVisitor)(const mirror::Object* root, void* arg, size_t vreg,
|
| vmap_table.h | 48 // Is the dex register 'vreg' in the context or on the stack? Should not be called when the
50 bool IsInContext(size_t vreg, VRegKind kind, uint32_t* vmap_offset) const {
65 if ((entry == vreg) && (in_floats == is_float)) {
|
| stack.cc | 135 uint32_t StackVisitor::GetVReg(mirror::ArtMethod* m, uint16_t vreg, VRegKind kind) const {
142 if (vmap_table.IsInContext(vreg, kind, &vmap_offset)) {
152 frame_size, vreg);
155 return cur_shadow_frame_->GetVReg(vreg);
159 void StackVisitor::SetVReg(mirror::ArtMethod* m, uint16_t vreg, uint32_t new_value,
167 if (vmap_table.IsInContext(vreg, kind, &vmap_offset)) {
178 int offset = GetVRegOffset(code_item, core_spills, fp_spills, frame_size, vreg);
183 return cur_shadow_frame_->SetVReg(vreg, new_value);
|
| /external/llvm/test/CodeGen/PowerPC/ |
| quadint-return.ll | 17 ; CHECK: %X3<def> = COPY %vreg
18 ; CHECK-NEXT: %X4<def> = COPY %vreg
|
| /external/llvm/lib/CodeGen/ |
| RegAllocPBQP.cpp | 143 /// \brief Finds the initial set of vreg intervals to allocate.
163 assert(vregItr != node2VReg.end() && "No vreg for node.");
167 PBQP::Graph::NodeItr PBQPRAProblem::getNodeForVReg(unsigned vreg) const {
168 VReg2Node::const_iterator nodeItr = vreg2Node.find(vreg);
169 assert(nodeItr != vreg2Node.end() && "No node for vreg.");
175 PBQPRAProblem::getAllowedSet(unsigned vreg) const {
176 AllowedSetMap::const_iterator allowedSetItr = allowedSets.find(vreg);
177 assert(allowedSetItr != allowedSets.end() && "No pregs for vreg.");
182 unsigned PBQPRAProblem::getPRegForOption(unsigned vreg, unsigned option) const {
183 assert(isPRegOption(vreg, option) && "Not a preg option.")
213 unsigned vreg = *vregItr; local
483 unsigned vreg = problem.getVRegForNode(node); local
[all...] |
| LiveIntervalUnion.cpp | 149 LiveInterval *VReg = LiveUnionI.value();
150 if (VReg != RecentReg && !isSeenInterference(VReg)) {
151 RecentReg = VReg;
152 InterferingVRegs.push_back(VReg);
|
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.cpp | 98 // If the node is only used by a CopyToReg and the dest reg is a vreg, use
99 // the CopyToReg'd destination register instead of creating a new vreg.
216 // is a vreg in the same register class, use the CopyToReg'd destination
217 // register instead of creating a new vreg.
272 unsigned VReg = getDstOfOnlyCopyToRegUse(Op.getNode(), Op.getResNo());
275 if (!VReg) {
278 VReg = MRI->createVirtualRegister(RC);
281 TII->get(TargetOpcode::IMPLICIT_DEF), VReg);
282 return VReg;
305 unsigned VReg = getVR(Op, VRBaseMap)
[all...] |
| InstrEmitter.h | 84 /// ConstrainForSubReg - Try to constrain VReg to a register class that
87 unsigned ConstrainForSubReg(unsigned VReg, unsigned SubIdx,
|
| /external/llvm/test/CodeGen/ARM/ |
| misched-copy-arm.ll | 36 ; CHECK: %[[R4:vreg[0-9]+]]<def>, %[[R1:vreg[0-9]+]]<def,tied2> = t2LDR_PRE %[[R1]]<tied1>
37 ; CHECK: %vreg{{[0-9]+}}<def> = COPY %[[R1]]
38 ; CHECK: %vreg{{[0-9]+}}<def> = COPY %[[R4]]
|
| /dalvik/vm/compiler/codegen/ |
| CodegenFactory.cpp | 176 int vReg = dvmCompilerS2VReg(cUnit, rlDest.sRegLow);
177 storeBaseDisp(cUnit, rFP, vReg << 2, rlDest.lowReg, kWord);
257 int vReg = dvmCompilerS2VReg(cUnit, rlDest.sRegLow);
258 assert((vReg+1) == dvmCompilerS2VReg(cUnit,
260 storeBaseDispWide(cUnit, rFP, vReg << 2, rlDest.lowReg,
|
| /art/compiler/dex/quick/x86/ |
| fp_x86.cc | 159 // In case result vreg is also src vreg, break association to avoid useless copy by EvalLoc()
181 // In case result vreg is also src vreg, break association to avoid useless copy by EvalLoc()
251 // In case result vreg is also src vreg, break association to avoid useless copy by EvalLoc()
|
| /external/llvm/test/CodeGen/X86/ |
| early-ifcvt-crash.ll | 11 ; on an inline asm instruction is not a vreg def.
|
| misched-copy.ll | 13 ; CHECK: MUL32r %vreg{{[0-9]+}}, %EAX<imp-def>, %EDX<imp-def>, %EFLAGS<imp-def,dead>, %EAX<imp-use>;
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| brw_wm_debug.c | 45 else if( value - c->vreg >= 0 &&
46 value - c->vreg < BRW_WM_MAX_VREG)
47 printf("r%ld", (long) (value - c->vreg));
|
| brw_wm_pass0.c | 52 memset(&c->vreg[c->nr_vreg], 0, sizeof(*c->vreg));
53 return &c->vreg[c->nr_vreg++];
|
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| brw_wm_debug.c | 45 else if( value - c->vreg >= 0 &&
46 value - c->vreg < BRW_WM_MAX_VREG)
47 printf("r%ld", (long) (value - c->vreg));
|
| brw_wm_pass0.c | 52 memset(&c->vreg[c->nr_vreg], 0, sizeof(*c->vreg));
53 return &c->vreg[c->nr_vreg++];
|
| /dalvik/vm/compiler/codegen/mips/ |
| CodegenFactory.cpp | 168 int vReg = dvmCompilerS2VReg(cUnit, rlDest.sRegLow);
169 storeBaseDisp(cUnit, rFP, vReg << 2, rlDest.lowReg, kWord);
248 int vReg = dvmCompilerS2VReg(cUnit, rlDest.sRegLow);
249 assert((vReg+1) == dvmCompilerS2VReg(cUnit,
251 storeBaseDispWide(cUnit, rFP, vReg << 2, rlDest.lowReg,
|
| /art/compiler/dex/quick/arm/ |
| fp_arm.cc | 258 // In case result vreg is also a src vreg, break association to avoid useless copy by EvalLoc()
267 // In case result vreg is also a srcvreg, break association to avoid useless copy by EvalLoc()
|
| /bionic/libc/arch-arm/bionic/ |
| memcpy.a9.S | 112 .macro cpy_line_vfp vreg, base
113 vstr \vreg, [dst, #\base]
114 vldr \vreg, [src, #\base]
121 vstr \vreg, [dst, #\base + 32]
122 vldr \vreg, [src, #\base + prefetch_lines * 64 - 32]
131 .macro cpy_tail_vfp vreg, base
132 vstr \vreg, [dst, #\base]
133 vldr \vreg, [src, #\base]
140 vstr \vreg, [dst, #\base + 32]
|
| /external/llvm/lib/Target/ARM/ |
| Thumb1RegisterInfo.cpp | 561 unsigned VReg = 0;
653 // register. The offset is already handled in the vreg value.
657 VReg = MF.getRegInfo().createVirtualRegister(&ARM::tGPRRegClass);
662 emitThumbRegPlusImmInReg(MBB, II, dl, VReg, FrameReg,
665 emitLoadConstPool(MBB, II, dl, VReg, 0, Offset);
669 emitThumbRegPlusImmediate(MBB, II, dl, VReg, FrameReg, Offset, TII,
672 MI.getOperand(FIOperandNum).ChangeToRegister(VReg, false, false, true);
675 // register. The offset is already handled in the vreg value.
|
