Lines Matching refs:rl_src
181 RegLocation rl_src = mir_graph_->GetSrc(mir, 0);
200 rl_src = LoadValue(rl_src, kCoreReg);
207 OpRegRegImm(kOpRsub, rl_result.low_reg, rl_src.low_reg, 1);
212 OpRegImm(kOpCmp, rl_src.low_reg, 0);
223 OpRegImm(kOpCmp, rl_src.low_reg, 0);
236 OpRegImm(kOpCmp, rl_src.low_reg, 0);
419 RegLocation rl_src, RegLocation rl_dest, int lit) {
434 rl_src = LoadValue(rl_src, kCoreReg);
438 NewLIR4(kThumb2Smull, r_lo, r_hi, r_magic, rl_src.low_reg);
442 rl_src.low_reg, EncodeShift(kArmAsr, 31));
445 OpRegRegImm(kOpAsr, r_lo, rl_src.low_reg, 31);
450 OpRegReg(kOpAdd, r_hi, rl_src.low_reg);
451 OpRegRegImm(kOpAsr, r_lo, rl_src.low_reg, 31);
576 void ArmMir2Lir::GenMultiplyByTwoBitMultiplier(RegLocation rl_src,
579 OpRegRegRegShift(kOpAdd, rl_result.low_reg, rl_src.low_reg, rl_src.low_reg,
625 void ArmMir2Lir::GenNegLong(RegLocation rl_dest, RegLocation rl_src) {
626 rl_src = LoadValueWide(rl_src, kCoreReg);
631 if (rl_result.low_reg == rl_src.high_reg) {
633 OpRegRegReg(kOpSub, rl_result.low_reg, z_reg, rl_src.low_reg);
637 OpRegRegReg(kOpSub, rl_result.low_reg, z_reg, rl_src.low_reg);
638 OpRegRegReg(kOpSbc, rl_result.high_reg, z_reg, rl_src.high_reg);
650 bool ArmMir2Lir::BadOverlap(RegLocation rl_src, RegLocation rl_dest) {
651 DCHECK(rl_src.wide);
653 return (abs(mir_graph_->SRegToVReg(rl_src.s_reg_low) - mir_graph_->SRegToVReg(rl_dest.s_reg_low)) == 1);
848 RegLocation rl_index, RegLocation rl_src, int scale) {
854 if (rl_src.wide) {
892 if (rl_src.wide || rl_src.fp || constant_index) {
893 if (rl_src.wide) {
894 rl_src = LoadValueWide(rl_src, reg_class);
896 rl_src = LoadValue(rl_src, reg_class);
911 if (rl_src.wide) {
912 StoreBaseDispWide(reg_ptr, data_offset, rl_src.low_reg, rl_src.high_reg);
914 StoreBaseDisp(reg_ptr, data_offset, rl_src.low_reg, size);
919 rl_src = LoadValue(rl_src, reg_class);
924 StoreBaseIndexed(reg_ptr, rl_index.low_reg, rl_src.low_reg,
937 RegLocation rl_index, RegLocation rl_src, int scale) {
950 LoadValueDirectFixed(rl_src, r_value); // Grab value
965 LoadValueDirectFixed(rl_src, r_value); // Reload value
987 if (!mir_graph_->IsConstantNullRef(rl_src)) {
993 RegLocation rl_dest, RegLocation rl_src, RegLocation rl_shift) {
994 rl_src = LoadValueWide(rl_src, kCoreReg);
998 StoreValueWide(rl_dest, rl_src);
1001 if (BadOverlap(rl_src, rl_dest)) {
1002 GenShiftOpLong(opcode, rl_dest, rl_src, rl_shift);
1010 OpRegRegReg(kOpAdd, rl_result.low_reg, rl_src.low_reg, rl_src.low_reg);
1011 OpRegRegReg(kOpAdc, rl_result.high_reg, rl_src.high_reg, rl_src.high_reg);
1013 OpRegCopy(rl_result.high_reg, rl_src.low_reg);
1016 OpRegRegImm(kOpLsl, rl_result.high_reg, rl_src.low_reg, shift_amount - 32);
1019 OpRegRegImm(kOpLsl, rl_result.high_reg, rl_src.high_reg, shift_amount);
1020 OpRegRegRegShift(kOpOr, rl_result.high_reg, rl_result.high_reg, rl_src.low_reg,
1022 OpRegRegImm(kOpLsl, rl_result.low_reg, rl_src.low_reg, shift_amount);
1028 OpRegCopy(rl_result.low_reg, rl_src.high_reg);
1029 OpRegRegImm(kOpAsr, rl_result.high_reg, rl_src.high_reg, 31);
1031 OpRegRegImm(kOpAsr, rl_result.low_reg, rl_src.high_reg, shift_amount - 32);
1032 OpRegRegImm(kOpAsr, rl_result.high_reg, rl_src.high_reg, 31);
1035 OpRegRegImm(kOpLsr, t_reg, rl_src.low_reg, shift_amount);
1036 OpRegRegRegShift(kOpOr, rl_result.low_reg, t_reg, rl_src.high_reg,
1039 OpRegRegImm(kOpAsr, rl_result.high_reg, rl_src.high_reg, shift_amount);
1045 OpRegCopy(rl_result.low_reg, rl_src.high_reg);
1048 OpRegRegImm(kOpLsr, rl_result.low_reg, rl_src.high_reg, shift_amount - 32);
1052 OpRegRegImm(kOpLsr, t_reg, rl_src.low_reg, shift_amount);
1053 OpRegRegRegShift(kOpOr, rl_result.low_reg, t_reg, rl_src.high_reg,
1056 OpRegRegImm(kOpLsr, rl_result.high_reg, rl_src.high_reg, shift_amount);
