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Lines Matching refs:ArmManagedRegister

27   return ArmManagedRegister::FromCoreRegister(IP);  // R12
31   return ArmManagedRegister::FromCoreRegister(IP);  // R12
36     return ArmManagedRegister::FromCoreRegister(R0);
38     return ArmManagedRegister::FromRegisterPair(R0_R1);
40     return ArmManagedRegister::FromRegisterPair(R0_R1);
42     return ArmManagedRegister::NoRegister();
44     return ArmManagedRegister::FromCoreRegister(R0);
57   return ArmManagedRegister::FromCoreRegister(R0);
63   return ArmManagedRegister::FromCoreRegister(R0);
94       entry_spills_.push_back(ArmManagedRegister::FromCoreRegister(R1));
96         entry_spills_.push_back(ArmManagedRegister::FromCoreRegister(R2));
98           entry_spills_.push_back(ArmManagedRegister::FromCoreRegister(R3));
125   callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R5));
126   callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R6));
127   callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R7));
128   callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R8));
129   callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R10));
130   callee_save_regs_.push_back(ArmManagedRegister::FromCoreRegister(R11));
141   return ArmManagedRegister::FromCoreRegister(R2);
189     return ArmManagedRegister::FromRegisterPair(R2_R3);
192       ArmManagedRegister::FromCoreRegister(kJniArgumentRegisters[itr_slots_]);