Lines Matching full:out_reg
1762 ArmManagedRegister out_reg = mout_reg.AsArm();
1765 CHECK(out_reg.IsCoreRegister()) << out_reg;
1769 // e.g. out_reg = (handle == 0) ? 0 : (SP+handle_offset)
1771 LoadFromOffset(kLoadWord, out_reg.AsCoreRegister(),
1773 in_reg = out_reg;
1776 if (!out_reg.Equals(in_reg)) {
1777 LoadImmediate(out_reg.AsCoreRegister(), 0, EQ);
1779 AddConstant(out_reg.AsCoreRegister(), SP, sirt_offset.Int32Value(), NE);
1781 AddConstant(out_reg.AsCoreRegister(), SP, sirt_offset.Int32Value(), AL);
1807 ArmManagedRegister out_reg = mout_reg.AsArm();
1809 CHECK(out_reg.IsCoreRegister()) << out_reg;
1812 if (!out_reg.Equals(in_reg)) {
1813 LoadImmediate(out_reg.AsCoreRegister(), 0, EQ);
1816 LoadFromOffset(kLoadWord, out_reg.AsCoreRegister(),
